公开(公告)号：EP1191128A3

公开(公告)日：2004-08-25

申请号：EP01121792.4

申请日：2001-09-20

申请人： EBARA CORPORATION ,  Kabushiki Kaisha Toshiba

发明人： Mishima, Koji ,  Inoue, Hiroaki ,  Makino, Natsuki ,  Kunisawa, Junji ,  Nakamura, Kenji ,  Matsuda, Tetsuo ,  Haneko, Hisashi ,  Morita, Toshiyuki, C-516, Toshiba-Hiyoshiryou

IPC分类号： C25D5/08 ,  C25D21/12 ,  C25D5/04

CPC分类号： H01L21/2885 ,  C25D5/04 ,  C25D5/08 ,  C25D21/12 ,  H01L21/7684 ,  H01L21/76877

摘要： The present invention relates to a plating method and a plating apparatus which can attain embedding of copper into fine interconnection patterns with the use of a plating liquid having high throwing power and leveling properties, and which can make the film thickness of the plated film substantially equal between the interconnection region and the non-interconnection region, thereby facilitating a later CMP processing. A plating method comprising filling a plating liquid containing metal ions and an additive into a plating space formed between a substrate and an anode disposed closely to the substrate so as to face the substrate, and changing the concentration of the additive in the plating liquid filled into the plating space during a plating process.

摘要翻译： 电镀方法和电镀装置技术领域本发明涉及一种电镀方法和电镀装置，其可以通过使用具有高抛光力和流平性的电镀液将铜嵌入精细互连图案中，并且可以使镀膜的膜厚基本相等 在互连区域和非互连区域之间，从而有助于稍后的CMP处理。 一种电镀方法，包括将含有金属离子的电镀液和添加剂填充到形成在基板和靠近基板的阳极之间形成的电镀空间中，以面对基板，并且将填充的电镀液中的添加剂的浓度变化 电镀过程中的电镀空间。

公开(公告)号：EP1193330A2

公开(公告)日：2002-04-03

申请号：EP01121793.2

申请日：2001-09-20

申请人： EBARA CORPORATION ,  Kabushiki Kaisha Toshiba

发明人： Kimura, Norio ,  Mishima, Koji ,  Kunisawa, Junji ,  Inoue, Hiroaki ,  Makino, Natsuki ,  Matsuda, Tetsuo ,  Kaneko, Hisashi

IPC分类号： C25D5/02 ,  C25D5/54 ,  C25D3/38 ,  C25D7/06 ,  C25D7/12

CPC分类号： C25D17/001 ,  C25D5/02 ,  C25D7/123 ,  C25D17/004 ,  C25D17/02

摘要： A substrate is plated with a metal film of uniform thickness only in a limited area thereof which is to be plated. A substrate plating apparatus has a substrate holder for holding a substrate and a plating cell for plating a portion of a surface, to be plated, of the substrate held by the substrate holder. The plating cell has an anode disposed so as to cover the portion of the surface, to be plated, of the substrate held by the substrate holder, a cathode for supplying a current to the surface, to be plated, of the substrate in such a state that the cathode is brought into contact with the substrate, a plating liquid supplying device for supplying a plating liquid between the anode and the surface, to be plated, of the substrate, and a power source for applying a voltage between the anode and the cathode.

摘要翻译： 基板上镀有均匀厚度的金属膜，仅在要镀覆的有限区域内。 基板电镀装置具有用于保持基板的基板保持器和用于镀覆被基板保持器保持的基板的待镀表面的一部分的电镀单元。 电镀单元具有阳极，该阳极设置成覆盖被基板保持器保持的基板的要被电镀的部分的阴极，该阴极用于向基板的待镀表面供电， 表示阴极与基板接触，用于在阳极和要被电镀的表面之间提供镀液的电镀液供给装置，以及用于在阳极和阳极之间施加电压的电源 阴极。

公开(公告)号：EP0628998A1

公开(公告)日：1994-12-14

申请号：EP94108251.3

申请日：1994-05-27

申请人： KABUSHIKI KAISHA TOSHIBA ,  EBARA CORPORATION

发明人： Miyata, Masahiro, c/o Intellectual Property Div. ,  Ezawa, Hirokazu, c/o Intellectual Property Div. ,  Ogure, Naoaki, c/o Intellectual Property Div. ,  Tsujimura, Manabu, c/o Intellectual Property Div. ,  Ohdaira, Takeyuki ,  Inoue, Hiroaki ,  Ikeda, Yukio

IPC分类号： H01L23/532 ,  H01L21/90

CPC分类号： H01L21/76873 ,  H01L21/76843 ,  H01L21/76858 ,  H01L21/76877 ,  H01L23/53242 ,  H01L23/53247 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device and a method for manufacturing the same according to the present invention, for example, an insulating film (12) is deposited on a silicon substrate (11), and a concave groove (13) is formed in the insulating film (12) in accordance with a predetermined wiring pattern. Titanium and palladium are deposited in sequence on the insulating film (12) to form a titanium film (14) and a palladium film (15), respectively. A silver film (16) is formed on the palladium film (15) by electroplating, and a groove-shaped silver wiring layer (17) is formed by polishing. The resultant structure is annealed at a temperature of about 700°C, and an intermetallic compound (18) is formed by alloying the titanium film (14) and palladium film (15) with each other. Consequently, a burying type wiring layer (19) whose resistance is lower than that of aluminum, is constituted by the silver wiring layer (17) and intermetallic compound (18).

摘要翻译： 在根据本发明的半导体器件及其制造方法中，例如，在硅衬底（11）上淀积绝缘膜（12），在绝缘膜上形成凹槽（13） 12）。 钛和钯依次沉积在绝缘膜（12）上以分别形成钛膜（14）和钯膜（15）。 通过电镀在钯膜（15）上形成银膜（16），通过研磨形成槽状的银布线层（17）。 所得结构在约700℃的温度下退火，并通过使钛膜（14）和钯膜（15）相互合金形成金属间化合物（18）。 因此，电阻比铝低的掩埋型布线层（19）由银布线层（17）和金属间化合物（18）构成。

公开(公告)号：EP0901153A3

公开(公告)日：2003-11-19

申请号：EP98116569.9

申请日：1998-09-02

申请人： EBARA CORPORATION

发明人： Kuriyama, Fumio ,  Hongo, Akihisa ,  Inoue, Hiroaki ,  Tokuoka, Tsuyoshi

IPC分类号： H01L21/00 ,  C23C18/18

CPC分类号： H01L21/6715 ,  H01L21/67144

摘要： A high quality metallic deposit can be produced inside the micro-cavities formed on a surface of a substrate by the present invention. The method comprises immersing the substrate in a liquid held in a processing chamber; evacuating the processing chamber so as to remove residual bubbles from the micro-cavities and to degas the liquid within the micro-cavities; and subjecting the liquid to boiling in at least those regions adjacent to the substrate.

公开(公告)号：EP1035583A3

公开(公告)日：2001-05-09

申请号：EP00104484.1

申请日：2000-03-09

申请人： KABUSHIKI KAISHA TOSHIBA ,  EBARA CORPORATION

发明人： Homma, Soichi ,  Miyata, Masahiro ,  Ezawa, Hirokazu ,  Yoshioka, Junichiro ,  Inoue, Hiroaki ,  Tokuoka, Tsuyoshi

IPC分类号： H01L23/532 ,  H01L23/485 ,  H01L21/60

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02126 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/16507 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01092 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/207 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： The present semiconductor element comprises a semiconductor substrate (1), a wiring pad (2) formed thereon, a layer of barrier metal formed thereon, an intermetallic compound Ag 3 Sn (7) formed thereon, and a protruded electrode consisting of low-melting metal (9) formed thereon. In addition, a fabricating method of a semiconductor element comprises the steps of forming a wiring pad on a semiconductor substrate, forming a layer of barrier metal thereon, forming a metallic layer containing Ag (11) thereon, forming a layer of low-melting metal containing Sn thereon, and melting the layer of low-melting metal containing Sn to form a protruded electrode and simultaneously to form an intermetallic compound Ag 3 Sn at an interface between the metallic layer containing Ag and the layer of low-melting metal containing Sn. Thus, with Pb-free solder, a semiconductor element of high reliability can be obtained.

公开(公告)号：EP1986215A1

公开(公告)日：2008-10-29

申请号：EP08013566.8

申请日：2001-05-28

申请人： EBARA CORPORATION

发明人： Mishima, Koji ,  Kunisawa, Junji ,  Makino, Natsuki ,  Kimura, Norio ,  Inoue, Hiroaki ,  Nakamura, Kenji ,  Matsumoto, Moriji ,  Nanjo, Takahiro ,  Odagaki, Mitsuko

IPC分类号： H01L21/00 ,  H01L21/68

CPC分类号： H01L21/67109 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/67778 ,  H01L21/681

摘要： A substrate processing apparatus fills a metal such as copper or the like in fine interconnection patterns or trenches defined in a semiconductor substrate. The substrate processing apparatus has a loading/unloading unit for placing a substrate cassette to load and unload a substrate, a substrate treating unit for treating a substrate, and a transfer robot for transferring a substrate between the loading/unloading unit and the substrate treating unit. The loading/unloading unit, the substrate treating unit, and the transfer robot are installed in a single facility. The loading/unloading unit has a rotary table which is horizontally rotatable for positioning the substrate cassette in a position to detect the substrate cassette placed in the loading/unloading unit and to remove the substrate from the substrate cassette with the transfer robot.

摘要翻译： 衬底处理设备以限定在半导体衬底中的精细互连图案或沟槽中填充诸如铜等的金属。 基板处理装置具有用于放置基板盒以装载和卸载基板的装载/卸载单元，用于处理基板的基板处理单元和用于在装载/卸载单元和基板处理单元之间传送基板的传送机器人 。 装载/卸载单元，基板处理单元和传送机器人安装在单个设施中。 装载/卸载单元具有水平旋转的旋转台​​，用于将基板盒定位在检测放置在装载/卸载单元中的基板盒的位置，并用传送机器人从基板盒移除基板。

公开(公告)号：EP1160837A3

公开(公告)日：2005-11-30

申请号：EP01113007.7

申请日：2001-05-28

申请人： EBARA CORPORATION

发明人： Mishima, Koji ,  Kunisawa, Junji ,  Makino, Natsuki ,  Kimura, Norio ,  Inoue, Hiroaki ,  Nakamura, Kenji ,  Matsumoto, Moriji ,  Nanjo, Takahiro ,  Odagaki, Mitsuko

IPC分类号： H01L21/00 ,  H01L21/68

CPC分类号： H01L21/67109 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/67778 ,  H01L21/681

摘要： A substrate processing apparatus fills a metal such as copper or the like in fine interconnection patterns or trenches defined in a semiconductor substrate. The substrate processing apparatus has a loading/unloading unit for placing a substrate cassette to load and unload a substrate, a substrate treating unit for treating a substrate, and a transfer robot for transferring a substrate between the loading/unloading unit and the substrate treating unit. The loading/unloading unit, the substrate treating unit, and the transfer robot are installed in a single facility. The loading/unloading unit has a rotary table which is horizontally rotatable for positioning the substrate cassette in a position to detect the substrate cassette placed in the loading/unloading unit and to remove the substrate from the substrate cassette with the transfer robot.

公开(公告)号：EP0966024A3

公开(公告)日：2005-01-05

申请号：EP99111089.1

申请日：1999-06-17

申请人： EBARA CORPORATION

发明人： Ogure, Naoaki ,  Inoue, Hiroaki

IPC分类号： H01L21/00

CPC分类号： H01L21/67098 ,  Y10T29/41

摘要： A method and apparatus can provide surface protection of substrates such as semiconductor wafers while they are being transported from one unit process to another unit process. The method comprises coating at least a part of a surface of the substrate with a coagulated film such as an ice film.

公开(公告)号：EP1204141A2

公开(公告)日：2002-05-08

申请号：EP01126114.6

申请日：2001-11-02

申请人： EBARA CORPORATION

发明人： Inoue, Hiroaki ,  Mishima, Koji ,  Kato, Takao ,  Nakamura, Kenji ,  Matsumoto, Moriji

IPC分类号： H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/2885 ,  H01L21/76865 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877

摘要： There is provided a method for forming interconnects by filling a conductive metal into fine recesses formed in the surface of a substrate, comprising: forming an underlying film on the surface of the substrate, the film comprising at least two kinds of metals; and conducting wet plating of the conductive metal onto the surface of the underlying film. The method can form a defect-free, completely embedded interconnects of a conductive material in recesses, even when the recesses are of a high aspect ratio.

摘要翻译： 提供了一种用于通过将导电金属填充到形成在基板的表面中的精细凹槽来形成互连的方法，包括：在所述基板的表面上形成下面的薄膜，所述薄膜包括至少两种金属; 并且将导电金属进行湿式电镀到基底膜的表面上。 该方法即使当凹槽具有高纵横比时，也可以在凹槽中形成导电材料的无缺陷的完全嵌入的互连。

公开(公告)号：EP1035583A2

公开(公告)日：2000-09-13

申请号：EP00104484.1

申请日：2000-03-09

申请人： KABUSHIKI KAISHA TOSHIBA ,  EBARA CORPORATION

发明人： Homma, Soichi ,  Miyata, Masahiro ,  Ezawa, Hirokazu ,  Yoshioka, Junichiro ,  Inoue, Hiroaki ,  Tokuoka, Tsuyoshi

IPC分类号： H01L23/532

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02126 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/16507 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01092 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/10253 ,  H01L2924/207 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： The present semiconductor element comprises a semiconductor substrate, a wiring pad formed thereon, a layer of barrier metal formed thereon, an intermetallic compound Ag 3 Sn formed thereon, and a protruded electrode consisting of low-melting metal formed thereon. In addition, a fabricating method of a semiconductor element comprises the steps of forming a wiring pad on a semiconductor substrate, forming a layer of barrier metal thereon, forming a metallic layer containing Ag thereon, forming a layer of low-melting metal containing Sn thereon, and melting the layer of low-melting metal containing Sn to form a protruded electrode and simultaneously to form an intermetallic compound Ag 3 Sn at an interface between the metallic layer containing Ag and the layer of low-melting metal containing Sn. Thus, with Pb-free solder, a semiconductor element of high reliability can be obtained.

摘要翻译： 本半导体元件包括半导体衬底，形成在其上的布线焊盘，形成在其上的阻挡金属层，形成在其上的金属间化合物Ag3Sn，以及由其上形成的低熔点金属组成的突出电极。 此外，半导体元件的制造方法包括以下步骤：在半导体衬底上形成布线焊盘，在其上形成阻挡金属层，在其上形成含有Ag的金属层，在其上形成含有Sn的低熔点金属层 并且熔化含有Sn的低熔点金属层以形成突出的电极，同时在包含Ag的金属层和含有Sn的低熔点金属层之间的界面处形成金属间化合物Ag 3 Sn。 因此，对于无铅焊料，可以获得高可靠性的半导体元件。