摘要:
The invention relates to a channel (1) which comprises: an input transmission line (7); an output transmission line (8); a coupling element (10-i) between the input and output lines including first and second meshes that are parallel to one another, the first mesh including a first active cell (16) including a transistor that can switch from a blocked state to a polarised state, the second mesh including a capacitor (Ci) and a second active cell (17) including a transistor, which can switch from a blocked state to a polarised state, one capacitance of the capacitor being selected so that a gain of the first mesh is different from the gain of the second mesh, the amplifier channel thus being capable of being switched between first and second states, each of which has a specific characteristic gain, so as to perform the gain blocking function.
摘要:
A receiver (305) comprises a differential common-gate amplifier (310) having a differential input and a differential output, wherein the differential input comprises a first input and a second input, and the differential common-gate amplifier (310) is configured to amplify an input differential signal at the differential input into an amplified differential signal at the differential output. The receiver also comprises a common-mode voltage sensor (322) configured to sense a common-mode voltage of the input differential signal, a replica circuit configured to generate a replica voltage that tracks a direct current (DC) voltage at at least one of the first and second inputs, and a comparator configured to compare the sensed common-mode voltage with the replica voltage, and to adjust a first bias voltage input to the differential common-gate amplifier (310) based on the comparison, wherein the DC voltage depends on the first bias voltage.
摘要:
An amplifier circuit includes a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second. The amplifier circuit includes a transimpedance amplifier having an input that communicates with the first terminal of the first transistor, and an output. The amplifier circuit includes an output amplifier having an input that communicates with the output of the transimpedance amplifier and an output.
摘要:
The present invention provides a new structure of Doherty power amplifier. The present invention reduces use of 1/4 wavelength lines and lowers the Q point of the Doherty power amplifier. The present method extends the DPA bandwidth with a simpler and more convenient design and facilitates the design of a narrowed size.
摘要:
An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance is provided. The amplifier circuit includes a plurality of amplifiers (U1, U2) each of which negative feedback is provided to and which are connected in series, and a feedback circuit (4, 8, 12) which is connected to an output side of an amplifier near output (U2) of the amplifier circuit and an input side of an amplifier near input (U1) of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.
摘要:
A Doherty amplifier including a carrier amplifier (Main), and at least one peaking amplifier (Peak), wherein an impedance inverter (6) at the output of the carrier amplifier includes first and second parallel paths, the first path (10) including a first λ/4 line impedance (L2a) providing an impedance inversion, and the second path (12) including a variable second impedance, including transmission line lengths (L2b, L3) and voltage controlled varactor devices (C1, C2) for adjustment of frequency response and/or output impedance of the impedance inversion means, in order to provide optimal impedance over a broadband range of frequencies.
摘要:
A Doherty amplifier including a carrier amplifier (Main), and at least one peaking amplifier (Peak), wherein an impedance inverter (6) at the output of the carrier amplifier includes first and second parallel paths, the first path (10) including a first λ/4 line impedance (L2a) providing an impedance inversion, and the second path (12) including a variable second impedance, including transmission line lengths (L2b, L3) and voltage controlled varactor devices (C1, C2) for adjustment of frequency response and/or output impedance of the impedance inversion means, in order to provide optimal impedance over a broadband range of frequencies.