COMMUNICATION METHOD FOR A SMART PHONE WITH A TEXT RECOGNITION MODULE
    1.
    发明申请
    COMMUNICATION METHOD FOR A SMART PHONE WITH A TEXT RECOGNITION MODULE 审中-公开
    具有文本识别模块的智能手机的通信方法

    公开(公告)号:US20170026502A1

    公开(公告)日:2017-01-26

    申请号:US15071122

    申请日:2016-03-15

    IPC分类号: H04M1/253 H04L29/06 H04W4/00

    摘要: A portable device can transmit information through one of a mobile phone network and an Internet, wherein the portable device includes a text-based communication module to allow a user may synchronously transmit or receive data through a local area network, wherein the data is text, audio, video or the combination thereof. The text-based communication module of the portable device includes a text-to-speech recognition module used to convert a text data for outputting the text data by vocal, and a read determination module for determining read target terminals and unread target terminals when a user of the portable phone device activates the read determination module.

    摘要翻译: 便携式设备可以通过移动电话网络和因特网之一发送信息,其中便携式设备包括基于文本的通信模块,以允许用户通过局域网同步地发送或接收数据,其中数据是文本, 音频,视频或其组合。 便携式设备的基于文本的通信模块包括用于转换用于通过声音输出文本数据的文本数据的文本到语音识别模块,以及用于当用户确定读取目标终端和未读取目标终端的读取确定模块 的便携式电话装置激活读取确定模块。

    FinFET device and method of manufacturing same
    2.
    发明授权
    FinFET device and method of manufacturing same 有权
    FinFET器件及其制造方法

    公开(公告)号:US08723272B2

    公开(公告)日:2014-05-13

    申请号:US13252892

    申请日:2011-10-04

    IPC分类号: H01L27/088

    摘要: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a fin structure disposed over the substrate. The fin structure includes one or more fins. The semiconductor device further includes an insulation material disposed on the substrate. The semiconductor device further includes a gate structure disposed on a portion of the fin structure and on a portion of the insulation material. The gate structure traverses each fin of the fin structure. The semiconductor device further includes a source and drain feature formed from a material having a continuous and uninterrupted surface area. The source and drain feature includes a surface in a plane that is in direct contact with a surface in a parallel plane of the insulation material, each of the one or more fins of the fin structure, and the gate structure.

    摘要翻译: 公开了一种用于制造半导体器件的半导体器件和方法。 示例性半导体器件包括:衬底,其包括设置在衬底上的鳍结构。 翅片结构包括一个或多个翅片。 半导体器件还包括设置在基板上的绝缘材料。 半导体器件还包括设置在鳍结构的一部分上和绝缘材料的一部分上的栅极结构。 栅极结构横穿翅片结构的每个翅片。 半导体器件还包括由具有连续且不间断表面积的材料形成的源极和漏极特征。 源极和漏极特征包括在与绝缘材料的平行平面中的表面直接接触的平面中的表面,翅片结构的一个或多个翅片中的每一个以及栅极结构。

    METAL GATE SEMICONDUCTOR DEVICE
    3.
    发明申请
    METAL GATE SEMICONDUCTOR DEVICE 有权
    金属栅极半导体器件

    公开(公告)号:US20130249010A1

    公开(公告)日:2013-09-26

    申请号:US13424935

    申请日:2012-03-20

    IPC分类号: H01L27/092 H01L21/8238

    摘要: Provided is a method and device that includes providing for a plurality of differently configured gate structures on a substrate. For example, a first gate structure associated with a transistor of a first type and including a first dielectric layer and a first metal layer; a second gate structure associated with a transistor of a second type and including a second dielectric layer, a second metal layer, a polysilicon layer, the second dielectric layer and the first metal layer; and a dummy gate structure including the first dielectric layer and the first metal layer.

    摘要翻译: 提供了一种方法和装置,其包括在基板上提供多个不同配置的栅极结构。 例如,与第一类型的晶体管相关并包括第一介电层和第一金属层的第一栅极结构; 与第二类型的晶体管相关联并包括第二介电层,第二金属层,多晶硅层,第二介电层和第一金属层的第二栅极结构; 以及包括第一介电层和第一金属层的虚拟栅极结构。

    SLIDING COVER FACEPLATE AND ELECTRONIC DEVICE USING THE SAME
    4.
    发明申请
    SLIDING COVER FACEPLATE AND ELECTRONIC DEVICE USING THE SAME 有权
    滑盖及其使用的电子装置

    公开(公告)号:US20100300724A1

    公开(公告)日:2010-12-02

    申请号:US12853276

    申请日:2010-08-09

    IPC分类号: H02G3/14

    CPC分类号: G06F1/181

    摘要: A sliding cover faceplate and an electronic device using the same are provided. The sliding cover faceplate includes a sliding cover, a cover plate, and a sliding structure. The cover plate is provided on the electronic device, and the sliding cover is disposed on one side of the cover plate. The sliding structure includes a guiding portion and an elastic positioning portion. The guiding portion is disposed on the cover plate and is connected to the sliding cover to guide the sliding cover to slide between a first location and a second location on the cover plate. The elastic positioning portion connects the cover plate with the sliding cover to provide an elastic force to the sliding cover, such that when the sliding cover slides close to the first location or the second location, the sliding cover is automatically positioned on the first location or the second location.

    摘要翻译: 提供一种滑盖面板和使用其的电子装置。 滑盖面板包括滑盖,盖板和滑动结构。 盖板设置在电子设备上,滑盖位于盖板的一侧。 滑动结构包括引导部分和弹性定位部分。 引导部分设置在盖板上并连接到滑盖上,以引导滑盖在盖板上的第一位置和第二位置之间滑动。 弹性定位部分将盖板与滑动盖连接,以向滑动盖提供弹性力,使得当滑动盖滑动靠近第一位置或第二位置时,滑动盖自动定位在第一位置或 第二个位置。

    Supercritical developing for a lithographic process
    5.
    发明授权
    Supercritical developing for a lithographic process 有权
    光刻工艺的超临界发展

    公开(公告)号:US07473517B2

    公开(公告)日:2009-01-06

    申请号:US11025538

    申请日:2004-12-29

    IPC分类号: G03F7/30

    CPC分类号: G03F7/322

    摘要: A method of creating a resist image on a semiconductor substrate includes exposing a layer of photoresist on the semiconductor substrate and developing the exposed layer of photoresist using a first fluid including supercritical carbon dioxide and a base such as Tetra-Methyl Ammonium Hydroxide (TMAH). Additionally, the developed photoresist can be cleaned using a second fluid including supercritical carbon dioxide and a solvent such as methanol, ethanol, isopropanol, and xylene.

    摘要翻译: 在半导体衬底上产生抗蚀剂图像的方法包括:使用包括超临界二氧化碳和碱(例如四甲基氢氧化铵(TMAH))的第一流体在半导体衬底上曝光光致抗蚀剂层并显影曝光的光致抗蚀剂层。 此外,可以使用包括超临界二氧化碳和溶剂如甲醇,乙醇,异丙醇和二甲苯的第二流体来清洗显影的光致抗蚀剂。

    Sliding cover faceplate and electronic device using the same
    6.
    发明申请
    Sliding cover faceplate and electronic device using the same 有权
    滑盖面板和使用其的电子设备

    公开(公告)号:US20080123276A1

    公开(公告)日:2008-05-29

    申请号:US11984477

    申请日:2007-11-19

    IPC分类号: G06F1/16 H05K7/14

    CPC分类号: G06F1/181

    摘要: A sliding cover faceplate and an electronic device using the same are provided. The sliding cover faceplate includes a sliding cover, a cover plate, and a sliding structure. The cover plate is provided on the electronic device, and the sliding cover is disposed on one side of the cover plate. The sliding structure includes a guiding portion and an elastic positioning portion. The guiding portion is disposed on the cover plate and is connected to the sliding cover to guide the sliding cover to slide between a first location and a second location on the cover plate. The elastic positioning portion connects the cover plate with the sliding cover to provide an elastic force to the sliding cover, such that when the sliding cover slides close to the first location or the second location, the sliding cover is automatically positioned on the first location or the second location.

    摘要翻译: 提供一种滑盖面板和使用其的电子装置。 滑盖面板包括滑盖,盖板和滑动结构。 盖板设置在电子设备上,滑盖位于盖板的一侧。 滑动结构包括引导部分和弹性定位部分。 引导部分设置在盖板上并连接到滑盖上,以引导滑盖在盖板上的第一位置和第二位置之间滑动。 弹性定位部分将盖板与滑动盖连接,以向滑动盖提供弹性力,使得当滑动盖滑动靠近第一位置或第二位置时,滑动盖自动定位在第一位置或 第二个位置。

    MRAM over sloped pillar
    7.
    发明授权
    MRAM over sloped pillar 有权
    MRAM倾斜柱

    公开(公告)号:US07319262B2

    公开(公告)日:2008-01-15

    申请号:US10917585

    申请日:2004-08-13

    IPC分类号: H01L29/82 H01L43/00 H01L21/00

    摘要: An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby also oriented at the acute angle relative to the substrate. The MRAM stack may comprise a plurality of substantially planar, parallel layers each oriented at an acute angle relative to the substrate.

    摘要翻译: 一种装置,包括位于衬底上方的柱,并且具有相对于衬底以锐角定向的至少一个倾斜表面。 该装置还包括基本上符合倾斜表面的MRAM堆叠,因此MRAM堆叠也相对于衬底以锐角取向。 MRAM堆叠可以包括多个基本上平面的平行层,每个平行层相对于衬底以锐角取向。

    Method of reducing the pattern effect in the CMP process
    8.
    发明授权
    Method of reducing the pattern effect in the CMP process 有权
    降低CMP工艺中图案效果的方法

    公开(公告)号:US07183199B2

    公开(公告)日:2007-02-27

    申请号:US10724201

    申请日:2003-12-01

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/3212 H01L21/7684

    摘要: A method of reducing the pattern effect in the CMP process. The method comprises the steps of providing a semiconductor substrate having a patterned dielectric layer, a barrier layer on the patterned dielectric layer, and a conductive layer on the barrier layer; performing a first CMP process to remove part of the conductive layer before the barrier layer is polished, thereby a step height of the conductive layer is reduced; depositing a layer of material substantially the same as the conductive layer on the conductive layer; and performing a second CMP process to expose the dielectric layer. A method of eliminating the dishing phenomena after a CMP process and a CMP rework method are also provided.

    摘要翻译: 降低CMP工艺中图案效果的方法。 该方法包括以下步骤:提供具有图案化介电层的半导体衬底,图案化电介质层上的阻挡层和阻挡层上的导电层; 在阻挡层被抛光之前执行第一CMP工艺以去除导电层的一部分,从而降低导电层的台阶高度; 在导电层上沉积与导电层基本相同的材料层; 以及执行第二CMP工艺以暴露所述电介质层。 还提供了在CMP处理和CMP返工方法之后消除凹陷现象的方法。

    Method for preventing voids in metal interconnects
    10.
    发明授权
    Method for preventing voids in metal interconnects 有权
    防止金属互连中空隙的方法

    公开(公告)号:US07122471B2

    公开(公告)日:2006-10-17

    申请号:US10835315

    申请日:2004-04-28

    摘要: A novel method for preventing the formation of voids in metal interconnects fabricated on a wafer, particularly during a thermal anneal process, is disclosed. The method includes fabricating metal interconnects between metal lines on a wafer. During a thermal anneal process carried out to reduce electrical resistance of the interconnects, the wafer is positioned in spaced-apart relationship to a wafer heater. This spacing configuration facilitates enhanced stabilility and uniformity in heating of the wafer by reducing the presence of particles on and providing a uniform flow of heated air or gas against and the wafer backside. This eliminates or at least substantially reduces the formation of voids in the interconnects during the anneal process.

    摘要翻译: 公开了一种用于防止在晶片上制造的金属互连中空隙形成的新方法,特别是在热退火工艺期间。 该方法包括在晶片上的金属线之间制造金属互连。 在进行用于降低互连的电阻的热退火工艺期间,晶片以与晶片加热器隔开的关系定位。 这种间隔结构通过减少加热的空气或气体抵靠和晶片背面的颗粒的存在而提高晶片加热的稳定性和均匀性。 这在退火过程中消除或至少基本上减少了互连件中空隙的形成。