公开(公告)号：US07319262B2

公开(公告)日：2008-01-15

申请号：US10917585

申请日：2004-08-13

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny D. Tang

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny D. Tang

IPC分类号： H01L29/82 ,  H01L43/00 ,  H01L21/00

CPC分类号： H01L43/08 ,  B82Y10/00 ,  G11C11/15 ,  H01L27/228

摘要： An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby also oriented at the acute angle relative to the substrate. The MRAM stack may comprise a plurality of substantially planar, parallel layers each oriented at an acute angle relative to the substrate.

摘要翻译： 一种装置，包括位于衬底上方的柱，并且具有相对于衬底以锐角定向的至少一个倾斜表面。 该装置还包括基本上符合倾斜表面的MRAM堆叠，因此MRAM堆叠也相对于衬底以锐角取向。 MRAM堆叠可以包括多个基本上平面的平行层，每个平行层相对于衬底以锐角取向。

公开(公告)号：US07221584B2

公开(公告)日：2007-05-22

申请号：US11053379

申请日：2005-02-08

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny D. Tang

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny D. Tang

IPC分类号： G11C11/00 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/228

摘要： A magnetic memory includes two first magnetic layers each oriented over a substrate, a second magnetic layer interposing the two first magnetic layers, and two dielectric layers each contacting the second magnetic layer and interposing the second magnetic layer and one of the two first magnetic layers. Each of the first and second magnetic layers and the dielectric layers may be oriented substantially perpendicular to the substrate or at an acute angle relative to the substrate.

摘要翻译： 磁存储器包括两个分别定向在衬底上的第一磁性层，插入两个第一磁性层的第二磁性层和与第二磁性层接触并插入第二磁性层和两个第一磁性层之一的两个电介质层。 第一和第二磁性层和电介质层中的每一个可以基本上垂直于衬底取向或相对于衬底成锐角。

公开(公告)号：US20060043463A1

公开(公告)日：2006-03-02

申请号：US10932198

申请日：2004-09-01

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Wen-Tin Chu

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Wen-Tin Chu

IPC分类号： H01L29/788

CPC分类号： H01L21/28194 ,  H01L21/28202 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor device includes a source and a drain formed in a substrate, a tunneling dielectric formed on the substrate between the source and the drain, and a floating gate disposed over the tunneling dielectric having a band-gap energy less than the energy band-gap of silicon.

摘要翻译： 半导体器件包括形成在衬底中的源极和漏极，形成在源极和漏极之间的衬底上的隧道电介质，以及设置在隧道电介质上的浮置栅极，其带隙能量小于能带隙能量 的硅。

公开(公告)号：US20060033133A1

公开(公告)日：2006-02-16

申请号：US11053379

申请日：2005-02-08

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny Tang

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny Tang

IPC分类号： H01L29/94

CPC分类号： H01L27/228

摘要： A magnetic memory includes two first magnetic layers each oriented over a substrate, a second magnetic layer interposing the two first magnetic layers, and two dielectric layers each contacting the second magnetic layer and interposing the second magnetic layer and one of the two first magnetic layers. Each of the first and second magnetic layers and the dielectric layers may be oriented substantially perpendicular to the substrate or at an acute angle relative to the substrate.

摘要翻译： 磁存储器包括两个分别定向在衬底上的第一磁性层，插入两个第一磁性层的第二磁性层和与第二磁性层接触并插入第二磁性层和两个第一磁性层之一的两个电介质层。 第一和第二磁性层和电介质层中的每一个可以基本上垂直于衬底取向或相对于衬底成锐角。

公开(公告)号：US20060055065A1

公开(公告)日：2006-03-16

申请号：US10938480

申请日：2004-09-10

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Syun-Ming Jang

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Syun-Ming Jang

IPC分类号： H01L31/109

CPC分类号： H01L27/12 ,  G02F1/13452 ,  H01L27/0629 ,  H01L27/105 ,  H01L27/1052

摘要： A semiconductor chip comprises a fast device formed on a semiconductor substrate and a high-voltage metal-oxide-semiconductor transistor (HV-MOS) formed on the semiconductor substrate and an interconnect isolation feature having a low-k dielectric material disposed over the fast device and the HV-MOS in the semiconductor substrate.

摘要翻译： 半导体芯片包括形成在半导体衬底上的快速器件和形成在半导体衬底上的高压金属氧化物半导体晶体管（HV-MOS），以及布置在快速器件上的具有低k电介质材料的互连隔离特征 和半导体衬底中的HV-MOS。

公开(公告)号：US20060033136A1

公开(公告)日：2006-02-16

申请号：US10917585

申请日：2004-08-13

申请人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny Tang

发明人： Chi-Wen Liu ,  Kuo-Ching Chiang ,  Horng-Huei Tseng ,  Denny Tang

IPC分类号： G11C11/15 ,  H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L43/08 ,  B82Y10/00 ,  G11C11/15 ,  H01L27/228

摘要： An apparatus including a pillar located over a substrate and having at least one sloped surface oriented at an acute angle relative to the substrate. The apparatus also includes an MRAM stack substantially conforming to the sloped surface, the MRAM stack thereby also oriented at the acute angle relative to the substrate. The MRAM stack may comprise a plurality of substantially planar, parallel layers each oriented at an acute angle relative to the substrate.

摘要翻译： 一种装置，包括位于衬底上方的柱，并且具有相对于衬底以锐角定向的至少一个倾斜表面。 该装置还包括基本上符合倾斜表面的MRAM堆叠，因此MRAM堆叠也相对于衬底以锐角取向。 MRAM堆叠可以包括多个基本上平面的平行层，每个平行层相对于衬底以锐角取向。

公开(公告)号：US09602659B2

公开(公告)日：2017-03-21

申请号：US14662247

申请日：2015-03-19

申请人： Horng-Huei Tseng ,  Kuo-Ching Chiang

发明人： Horng-Huei Tseng ,  Kuo-Ching Chiang

IPC分类号： H04M1/725 ,  H04M3/42 ,  H04M3/22 ,  H04M1/00

CPC分类号： H04M3/42221 ,  H04M1/00 ,  H04M1/27455 ,  H04M3/2218 ,  H04M2203/301 ,  H04M2203/305 ,  H04M2250/60

摘要： A portable device with communication record recurring module is proposed. It allows phone records of the portable device recurring by the communication record recurring module. The communication record recurring module is capable of recurring phone records of the portable device. The recurring number of the phone records can be set as a per-determined number, and sequential order of the phone records is arranged by chronological sequence.

公开(公告)号：US20060046211A1

公开(公告)日：2006-03-02

申请号：US10928455

申请日：2004-08-27

申请人： Chi-Wen Liu ,  Horng-Huei Tseng ,  Chin-Hsiang Lin

发明人： Chi-Wen Liu ,  Horng-Huei Tseng ,  Chin-Hsiang Lin

IPC分类号： G03B27/52 ,  G03F7/20

CPC分类号： G03F7/70341

摘要： A method and system is disclosed for conducting immersion photolithography. The system includes at least one lens for transmitting a predetermined radiation on a predetermined substrate with a distance between the lens and the substrate shorter than a predetermined threshold, and a fluid volume in contact with the lens on its first end, and with the substrate on its second end, wherein the fluid volume is an effectively water-free fluid.

摘要翻译： 公开了用于进行浸没光刻的方法和系统。 该系统包括至少一个透镜，用于在预定基板上传输预定辐射，透镜和衬底之间的距离小于预定阈值，以及在其第一端上与透镜接触的流体体积，并且衬底在 其第二端，其中流体体积是有效的无水流体。

公开(公告)号：US07652378B2

公开(公告)日：2010-01-26

申请号：US11582129

申请日：2006-10-17

申请人： Horng-Huei Tseng ,  Chenming Hu

发明人： Horng-Huei Tseng ,  Chenming Hu

IPC分类号： H01L23/48

CPC分类号： H01L23/53238 ,  H01L23/53223 ,  H01L24/02 ,  H01L2224/04073 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3025

摘要： A semiconductor metal structure with an efficient usage of the chip area is provided. The structure includes a substrate, a copper-based interconnection structure over the substrate, the copper-based interconnection structure comprising a plurality of metallization layers connected by vias and in first dielectric layers, at least one aluminum-based layer over and connected to the copper-based interconnection structure, wherein a top layer of the at least one aluminum-based layer comprises a bond pad and an interconnect line connecting to two underlying vias, vias/contacts connecting a top layer of the copper-based interconnection structure and a bottom layer of the at least one aluminum-based layer, wherein the vias/contacts are in a second dielectric layer, and a third dielectric layer overlying the at least one aluminum-based layer, wherein the bond pad is exposed through an opening in the third dielectric layer.

摘要翻译： 提供了一种有效利用芯片面积的半导体金属结构。 该结构包括衬底，在衬底上的铜基互连结构，铜基互连结构包括通过通孔连接的多个金属化层和在第一介电层中的至少一个铝基层，并连接到铜 的所述互连结构，其中所述至少一个铝基层的顶层包括接合焊盘和连接到两个底部通孔的互连线，连接铜基互连结构的顶层的通孔/触点和底层 的至少一个铝基层，其中所述通孔/触点位于第二电介质层中，以及覆盖所述至少一个铝基层的第三电介质层，其中所述接合焊盘通过所述第三电介质中的开口暴露 层。

公开(公告)号：US20080102198A1

公开(公告)日：2008-05-01

申请号：US11964195

申请日：2007-12-26

申请人： Chen-Hua Yu ,  Horng-Huei Tseng

发明人： Chen-Hua Yu ,  Horng-Huei Tseng

IPC分类号： B05D5/10

CPC分类号： H01L24/05 ,  H01L21/76849 ,  H01L21/76867 ,  H01L21/76886 ,  H01L23/53233 ,  H01L23/5329 ,  H01L24/03 ,  H01L24/13 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48647 ,  H01L2224/48684 ,  H01L2224/48747 ,  H01L2224/48784 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48781 ,  H01L2224/48681

摘要： A bonding structure and the method of fabricating the same are disclosed. The bonding structure of the invention includes a copper-based pad formed in an insulator layer and a protection layer substantially covering top surface of the copper-based pad. The protection layer is self-aligned formed and the material thereof is selected from a group consisting of metal nitride, copper alloy, copper compounds, and a combination thereof.

摘要翻译： 公开了一种接合结构及其制造方法。 本发明的接合结构包括形成在绝缘体层中的铜基焊盘和基本上覆盖铜基焊盘顶表面的保护层。 保护层是自对准的，其材料选自金属氮化物，铜合金，铜化合物及其组合。