Abstract:
Disclosed herein are a stereoscopic image generation method of background terrain scenes, a system using the same, and a recording medium for the same. The stereoscopic image generation method of background terrain scenes includes an initial mesh creation step of creating an initial mesh using terrain geometry based on image sequences, a geometry error correction step of generating a projection map, detecting error regions of the initial mesh using the generated projection map, generating a vector map of the detected error regions, and generating a corrected mesh, error of which is corrected, and a stereo conversion step of generating a stereoscopic image using the corrected mesh. Since the stereoscopic image is generated based on the mesh, the mesh fits the terrain shape even though the geometry is complex. Further, time coherence can be enforced, the mesh can be edited easily, and new elements can be unseamingly composed into the terrain. Thus, it is possible to prevent a viewer who views the stereoscopic image from becoming tired.
Abstract:
A semiconductor device includes an internal circuit region on a semiconductor substrate, at least one guard ring on the semiconductor substrate, the guard ring surrounding the internal circuit region, and at least one current blocking unit on the semiconductor substrate, the current blocking unit being configured to block an electric current flowing from the guard ring to the semiconductor substrate.
Abstract:
A method of forming a contact structure in a semiconductor device includes forming an interlayer insulating layer containing impurities on a semiconductor substrate. The interlayer insulating layer is patterned to form a pad contact hole. The pad contact hole is filled with a conductive pad. Thermal oxidation annealing is then carried out to form an oxide layer on a top surface of the conductive pad and at an interface between the conductive pad and the interlayer insulating layer.
Abstract:
Disclosed herein are a stereoscopic image generation method of background terrain scenes, a system using the same, and a recording medium for the same. The stereoscopic image generation method of background terrain scenes includes an initial mesh creation step of creating an initial mesh using terrain geometry based on image sequences, a geometry error correction step of generating a projection map, detecting error regions of the initial mesh using the generated projection map, generating a vector map of the detected error regions, and generating a corrected mesh, error of which is corrected, and a stereo conversion step of generating a stereoscopic image using the corrected mesh. Since the stereoscopic image is generated based on the mesh, the mesh fits the terrain shape even though the geometry is complex. Further, time coherence can be enforced, the mesh can be edited easily, and new elements can be unseamingly composed into the terrain. Thus, it is possible to prevent a viewer who views the stereoscopic image from becoming tired.
Abstract:
Disclosed herein are a method and a system for stereoscopic three-dimensional (3D) cartoon conversion and a recording medium for the same. In accordance with the method and the system for stereoscopic 3D cartoon conversion and the recording medium for the same, a two-dimensional (2D) digital still image and an alpha map image including depth information are received, and a depth information range, absolute binocular parallax, relative binocular parallax and a screen position are simultaneously controlled based on the depth information included in the alpha map image and a user input, thereby generating a stereoscopic 3D cartoon. Accordingly, it is possible to maximize productivity as compared to a manual operation.
Abstract:
A method of manufacturing a semiconductor device and a semiconductor device manufactured thereby are provided. The method includes forming a molding layer on a substrate, forming support patterns spaced apart from each other on the molding layer, forming storage node electrodes penetrating the molding layer on sidewalls of the support patterns and wherein the storage node electrodes are supported by the support patterns. The method further includes removing the molding layer, forming a dielectric layer on the storage node electrodes, and forming a plate electrode on the dielectric layer.
Abstract:
A method of fabricating a semiconductor device includes forming a photo-sensitive polyimide layer on a semiconductor substrate, patterning the photo-sensitive polyimide layer using a mask having a layer for adjusting light transmittance, and forming an epoxy molding compound on the substrate having the photo-sensitive polyimide layer patterns.
Abstract:
There is provided a method for manufacturing a semiconductor device which can provide global planarization between a cell array region and a periphery region by a simple process. An interlevel dielectric layer is formed over the entire surface of a semiconductor substrate where a global step difference exists between a cell array region and a periphery region. A first material layer serving as a stopper is formed on the interlevel dielectric layer. A contact hole partially exposing the semiconductor substrate of the cell array region is formed by patterning the first material layer and the interlevel dielectric layer. A conductive layer is formed over the entire surface of the semiconductor substrate where the contact hole is formed. Global planarization is provided between the cell array region and the periphery region by performing a chemical mechanical polishing (CMP) process on the semiconductor substrate where the conductive layer is formed.
Abstract:
A semiconductor memory device with a capacitor-over-bitline (COB) structure and a method for fabricating the same. The semiconductor memory device includes a transistor having a gate electrode formed on a gate insulating layer on a semiconductor substrate and having source and drain regions formed on the surface of the substrate and separated from each other by the gate electrode, a first interlayer insulating layer formed over the substrate including the transistor; a bitline formed over the first interlayer insulating layer; and a second interlayer insulating layer formed over the substrate including the bitline, for insulating the bitline from a storage node of a capacitor. A surface of the second interlayer insulating layer is planarized by a chemical-mechanical polishing (CMP) process so as to be substantially parallel to a surface of the substrate including the bitline.
Abstract:
A semiconductor device includes an internal circuit region on a semiconductor substrate, at least one guard ring on the semiconductor substrate, the guard ring surrounding the internal circuit region, and at least one current blocking unit on the semiconductor substrate, the current blocking unit being configured to block an electric current flowing from the guard ring to the semiconductor substrate.