摘要:
A security coating on an electronic circuit assembly comprises a mesh coating that may have a unique signature pattern and comprise materials that easily produce an image of the signature so that it is possible to determine if reverse engineering has been attempted. Spaces in the mesh may include electrical components to erase circuit codes to destroy the functionality and value of the protected die if the mesh coated is disturbed. The voids may include compositions to enhance the mesh signature and abrade the circuit if tampering takes place.
摘要:
A security coating on an electronic circuit assembly comprises a mesh coating that may have a unique signature pattern and comprise materials that easily produce an image of the signature so that it is possible to determine if reverse engineering has been attempted. Spaces in the mesh may include electrical components to erase circuit codes to destroy the functionality and value of the protected die if the mesh coated is disturbed. The voids may include compositions to enhance the mesh signature and abrade the circuit if tampering takes place.
摘要:
An improved system and method for protecting sensitive electronic equipment or components against unauthorized access, by detecting and also reacting to unauthorized intrusions into the enclosures for the sensitive electronic equipment or components is disclosed. For example, a protective system for protecting sensitive electronic equipment or components against unauthorized access is disclosed that includes a fiber optic cable mesh or network attached to, or embedded in, the walls of the enclosure for the electronic equipment or components. A continuous signal or burst is applied to the fiber optic cable, which is coupled to an optical signal detection device. Thus, any attempt to remove or penetrate the walls of the enclosure interrupts the signal in the fiber optic cable, and the interruption of the signal is detected by the optical signal detection device. In response to the detection of the interruption of the signal in the fiber optic cable, a process can be initiated to erase, destroy or alter sensitive data contained within the electronic equipment or components. Also, a power source for the protective system is disclosed, which can be self-sustaining and contained within the protected enclosure for the sensitive electronic equipment or components.
摘要:
A method for producing an interferogram of an infrared translucent layer that is on a reflective substrate, comprising generating parallel infrared interferometer beams by means of an infrared interferometer, converging the parallel infrared interferometer beams into converging infrared interferometer beams, sending the converging infrared interferometer beams onto the infrared translucent layer to produce diffusely reflected infrared interferometer rays from above and below the infrared translucent layer, and making the diffusely reflected infrared interferometer rays into parallel reflected infrared interferometer rays.
摘要:
Disclosed is a method of forming a primer coating and an opaque coating on an integrated circuit or multichip module. First a primer coating composition is applied to a surface of the integrated circuit device or multichip module to form a primer coating that increases the resistance of the surface to thermal and mechanical damage that may occur as a result of the application of the opaque coating. An opaque coating composition is then heated to a molten state and the molten opaque coating composition is applied over the primer coating to form an opaque coating that overlies active circuitry on the surface, to prevent optical and radiation based inspection and reverse engineering of the active circuitry.
摘要:
In some examples, an integrated circuit system includes a plurality of integrated circuit layers. At least one of the integrated circuit layers includes an integrated circuit die, which may not include any through-silicon vias that provide a pathway to an adjacent integrated circuit layer, and an interposer portion, which includes electrically conductive through-vias. The interposer portion may facilitate communication of the integrated circuit die with other integrated circuit layers of the integrated circuit system. In some examples, the stacked integrated circuit system may include more than one integrated circuit die, which may be in the same integrated circuit layer as at least one other integrated circuit die, or may be in a different integrated circuit layer.
摘要:
An integrated circuit (IC) package with a fibrous interface is provided. The package includes a substrate, a bond coat and a top coat. The substrate is configured to contain IC components and connections. The bond coat layer is configured to encapsulate the IC components. The top coat layer has at least a portion embedded in the bond coat layer. Moreover, the top coat layer includes a fibrous interface configured to provide security and strengthen the bond coat layer.
摘要:
An anti-tamper system is provided. The anti-tamper system comprises a clamshell protective encasement adapted to encapsulate at least one device on a single circuit board such that at least one electrical connector of the single circuit board is accessible. The anti-tamper system also comprises one or more sensors embedded inside the clamshell protective encasement, the one or more sensors being adapted to detect unauthorized attempts to tamper with the clamshell protective encasement.
摘要:
an integrated circuit (IC) package with a fibrous interface is provided. The package includes a substrate, a bond coat and a top coat. The substrate is configured to contain IC components and connections. The bond coat layer is configured to encapsulate the IC components. The top coat layer has at least a portion embedded in the bond coat layer. Moreover, the top coat layer includes a fibrous interface configured to provide security and strengthen the bond coat layer.
摘要:
A secure chassis comprises a plurality of walls, wherein each wall comprises an inner portion; an outer portion; and a tamper sensor disposed between the inner portion and the outer portion of each wall, the tamper sensor configured to detect unauthorized tamper events; wherein the plurality of walls are coupled together to form an enclosure to house one or more components.