Abstract:
A gate electrode for semiconductor devices, the gate electrode comprising a mixture of a metal having a work function of about 4 eV or less and a metal nitride.
Abstract:
An electromagnetic forming device for a sheet of material is provided. The electromagnetic forming device includes a fixing base, a magnetic concentration block, an electromagnetic actuator, and a die. The fixing base has a groove. The magnetic concentration block is disposed in the groove of the fixing base, and has an accommodating space therein, which is in communication with a surface of the magnetic concentration block via a slit. The electromagnetic actuator, used to generate a magnetic field, is disposed in the accommodating space of the magnetic concentration block, but does not contact the magnetic concentration block. The die and the magnetic concentration block are separated by a gap, and a sheet of material can be disposed in the gap. As the magnetic concentration block is a block, eddy currents in the magnetic concentration block are distributed uniformly, so the generated magnetic field is also distributed uniformly, thus exerting a uniform forming force on the sheet of material.
Abstract:
This invention relates to a semiconductor device making use of a highly thermal robust metal electrode as gate material. In particular, the development of Hafnium Nitride as a metal gate electrode (or a part of the metal gate stack) is taught and its manufacturing steps of fabrication with different embodiments are shown.
Abstract:
An N-type Schottky barrier Source/Drain Transistor (N-SSDT) that uses ytterbium silicide (YbSi2-x) for the source and drain is described. The structure includes a suitable capping layer stack.
Abstract:
This invention relates to a semiconductor device making use of a highly thermal robust metal electrode as gate material. In particular, the development of Hafnium Nitride as a metal gate electrode (or a part of the metal gate stack) is taught and its manufacturing steps of fabrication with different embodiments are shown.
Abstract:
A method of fabricating an N-type Schottky barrier Source/Drain Transistor (N-SSDT) with ytterbium silicide (YbSi2-x) for source and drain is presented. The fabrication of YbSi2-x is compatible with the normal CMOS process but ultra-high vacuum, which is required for ErSi2-x fabrication, is not needed here. To prevent oxidation of ytterbium during ex situ annealing and to improve the film quality, a suitable capping layer stack has been developed.
Abstract:
A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO2, Si3N4, Al2O3, Y2O3, Ta2O5, TiO2, HfO2, Pr2O3, ZrO2, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.
Abstract translation:通过金属对金属热压接合,阳极接合,共晶接合,等离子体接合,硅 - 二极管等工艺,形成双层势垒共振隧道二极管(RTD)并与CMOS / BJT / SiGe器件和电路集成, 硅键合,二氧化硅键合,氮化硅键合和聚合物键合或等离子体键合。 电连接使用在接合过程中对准的导电互连来制成。 所得到的电路具有三维结构。 RTD的隧道势垒层由高K电介质材料形成,例如SiO 2,Si 3 N 4 N 4,Al 2 O 3, 2个O 3,3个O 3,3个O 2,3个O 3, TiO 2,TiO 2,HfO 2,Pr 2 O 3,ZrO 2,N 2, >或其合金和层压体,具有比形成量子阱的材料(包括Si,Ge或SiGe)更高的带隙。 RTD的固有的快速操作速度与减少互连延迟的3-D集成架构相结合,将产生具有低噪声特性的超快速电路。
Abstract:
A mold set for manufacturing a case is provided. The mold set comprises an upper mold having a fluid channel; a lower mold facing the upper mold; and a drawing mold disposed between the upper mold and the lower mold, wherein the mold set has a case forming space formed among the upper mold, the lower mold and the drawing mold, and the mold set has a sharp-edge forming space communicating with the case forming space, and formed between the drawing mold and the lower mold.
Abstract:
A method of fabricating an N-type Schottky barrier Source/Drain Transistor (N-SSDT) with ytterbium silicide (YbSi2-x) for source and drain is presented. The fabrication of YbSi2-x is compatible with the normal CMOS process but ultra-high vacuum, which is required for ErSi2-x fabrication, is not needed here. To prevent oxidation of ytterbium during ex situ annealing and to improve the film quality, a suitable capping layer stack has been developed.
Abstract:
A gate electrode for semiconductor devices, the gate electrode comprising a mixture of a metal having a work function of about 4 eV or less and a metal nitride.