Method of Producing Artificial Stones with Aluminum residues
    1.
    发明申请
    Method of Producing Artificial Stones with Aluminum residues 审中-公开
    生产人造石与铝残留物的方法

    公开(公告)号:US20130049248A1

    公开(公告)日:2013-02-28

    申请号:US13222061

    申请日:2011-08-31

    Abstract: The present disclosure uses aluminum residues to fabricate artificial stones. The aluminum residues are obtained from a recycle process of aluminum scrap. The aluminum residues is made into dross and baghouse dust as raw materials for the artificial stones. The artificial stones thus made are improved in characteristics of mechanical strength, hardness, abrasion resistance, flame resistance and anti-oxidation. Hence, the present disclosure reduces impacts to the nature; obtains derived products from recycled aluminum residues; increases commercial income; decreases cost for handling aluminum residues; and saves the use of aluminum oxide, aluminium hydroxide or silicon oxide on making artificial stones. The artificial stones thus made are fit to be used in fields of green material, green construction and green industry.

    Abstract translation: 本公开使用铝残留物来制造人造石。 铝残留物是从铝废料的再循环过程获得的。 铝残留物作为人造石的原料制成浮渣和袋装粉尘。 这样制造的人造石的机械强度,硬度,耐磨性,阻燃性和抗氧化特性得到改善。 因此,本公开减少了对本质的影响; 从回收的铝残留物中获得衍生产品; 增加商业收入; 降低处理铝渣的成本; 并节省使用氧化铝,氢氧化铝或氧化硅制造人造石。 这样制造的人造石适合用于绿色材料,绿色建筑和绿色工业领域。

    DYNAMIC RANDOM ACCESS MEMORY CELL AND ARRAY HAVING VERTICAL CHANNEL TRANSISTOR
    8.
    发明申请
    DYNAMIC RANDOM ACCESS MEMORY CELL AND ARRAY HAVING VERTICAL CHANNEL TRANSISTOR 有权
    具有垂直通道晶体管的动态随机存取存储器单元和阵列

    公开(公告)号:US20120153371A1

    公开(公告)日:2012-06-21

    申请号:US13030116

    申请日:2011-02-17

    CPC classification number: H01L27/10826 H01L27/10879

    Abstract: A dynamic random access memory cell having vertical channel transistor includes a semiconductor pillar, a drain layer, an assisted gate, a control gate, a source layer, and a capacitor. The vertical channel transistor has an active region formed by the semiconductor pillar. The drain layer is formed at the bottom of the semiconductor pillar. The assisted gate is formed beside the drain layer, and separated from the drain layer by a first gate dielectric layer. The control gate is formed beside the semiconductor pillar, and separated from the active region by a second gate dielectric layer. The source layer is formed at the top of the semiconductor pillar. The capacitor is formed to electrical connect to the source layer.

    Abstract translation: 具有垂直沟道晶体管的动态随机存取存储器单元包括半导体柱,漏极层,辅助栅极,控制栅极,源极层和电容器。 垂直沟道晶体管具有由半导体柱形成的有源区。 漏极层形成在半导体柱的底部。 辅助栅极形成在漏极层旁边,并且通过第一栅极介电层与漏极层分离。 控制栅极形成在半导体柱旁边,并通过第二栅极介电层与有源区分离。 源极层形成在半导体柱的顶部。 电容器形成为电连接到源层。

    Anti-pop circuit
    9.
    发明授权
    Anti-pop circuit 有权
    防爆电路

    公开(公告)号:US08199929B2

    公开(公告)日:2012-06-12

    申请号:US11400317

    申请日:2006-04-10

    CPC classification number: H04R3/007

    Abstract: An anti-pop circuit is coupled with a sound outputting device to prevent a “pop” sound form being mixed into a sound signal. The anti-pop circuit includes a control signal generator and a fist diode. The control signal generator generates a control signal with a high level state and a low level state. The first diode couples with the sound outputting device. The sound signal is transferred to the first diode when said first diode is in a forward bias state, and the sound signal is outputted from an output end of the sound outputting device when the first diode is in a reverse bias state.

    Abstract translation: 防爆电路与声音输出装置耦合,以防止“声音”声音混合成声音信号。 防爆电路包括控制信号发生器和第一二极管。 控制信号发生器产生具有高电平状态和低电平状态的控制信号。 第一个二极管与声音输出装置耦合。 当所述第一二极管处于正向偏置状态时,所述声音信号被传送到所述第一二极管,并且当所述第一二极管处于反向偏置状态时,所述声音信号从所述声音输出装置的输出端输出。

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