METHOD OF DETERMINING MARK STRUCTURE FOR OVERLAY FINGERPRINTS

    公开(公告)号:US20230408931A1

    公开(公告)日:2023-12-21

    申请号:US18035286

    申请日:2021-11-01

    Abstract: An apparatus and a method for generating a metrology mark structure that can be formed on a substrate for measuring overlay characteristics induced by one or more processes performed on the substrate by determining features for the metrology mark structure based on a pattern distribution. The method involves obtaining a function to characterize an overlay fingerprint induced by a process performed on a substrate. Based on the function, a pattern distribution is derived, the pattern distribution being indicative of a number of features (e.g., indicative of density) within a portion of the substrate. Based on the pattern distribution, a physical characteristic (e.g., shape, size, etc.) of the features of the metrology mark structure is determined.

    VOLTAGE CONTRAST METROLOGY MARK
    6.
    发明申请

    公开(公告)号:US20210088917A1

    公开(公告)日:2021-03-25

    申请号:US16772022

    申请日:2018-12-07

    Abstract: A measurement mark is disclosed. According to certain embodiments, the measurement mark includes a set of first test structures developed in a first layer on a substrate, each of the set of first test structures comprising a plurality of first features made of first conducting material. The measurement mark also includes a set of second test structures developed in a second layer adjacent to the first layer, each of the set of second test structures comprising a plurality of second features made of second conducting material. The measurement mark is configured to indicate connectivity between the set of first test structures and associated second test structures in the set of second test structures when imaged using a voltage-contrast imaging method.

    METHOD FOR CLASSIFYING SEMICONDUCTOR WAFERS
    7.
    发明公开

    公开(公告)号:US20230316103A1

    公开(公告)日:2023-10-05

    申请号:US18013636

    申请日:2021-06-21

    CPC classification number: G06N5/022 H01L22/20

    Abstract: Methods and apparatus for classifying semiconductor wafers. The method can include: sorting a set of semiconductor wafers, using a model, into a plurality of sub-sets based on parameter data corresponding to one or more parameters of the set of semiconductor wafers, wherein the parameter data for semiconductor wafers in a sub-set include one or more common characteristics; identifying one or more semiconductor wafers within a sub-set based on a probability of the one or more semiconductor wafers being correctly allocated to the sub-set; comparing the parameter data of the one or more identified semiconductor wafers to reference parameter data; and reconfiguring the model based on the comparison. The comparison is undertaken by a human to provide constraints for the model. The apparatus can be configured to undertake the method.

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