Abstract:
An electronic display may include a touch sensing system configured to perform touch sensing in an active area of the electronic display and display driver circuitry configured to program display pixels of the active area to emit light. The electronic display may also include the active area. The active area may include a first portion and a second portion that are at least partially electrically separated. The display driver circuitry may program the display pixels in the first portion while the touch sensing circuitry may perform touch sensing in the second portion.
Abstract:
An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.
Abstract:
A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.
Abstract:
A display may have pixels configured to display images. The pixels may be formed from thin-film transistor circuitry on a substrate. Color filter elements formed from colored polymer such as colored photoimageable polymer may be formed on the substrate. A black matrix formed from black photoimageable polymer may have an array of openings. The colored polymer may have first portions that overlap the black matrix and second portions in the openings that form the color filter elements. In some portions of the pixels, the thin-film transistor circuitry may be interposed between the first portions of the colored polymer and the black matrix. In other portions of the pixels, data lines may be formed that are overlapped by the black matrix and that are interposed between the first portions of the colored polymer and the black matrix.
Abstract:
Display backplanes and pixel element structures are described. In an embodiment, a pixel electrode is located between two stacked data lines, with a left edge of the pixel electrode being separated from a first lower data line by approximately a same distance as a right edge of the pixel electrode is separated from a second lower data line.
Abstract:
A display may have an array of light-emitting diode pixels or pixels containing portions of a liquid crystal layer to which electric fields are applied using electrodes. A pixel with a light-emitting diode may have a drive transistor coupled in series with the light-emitting diode. A storage capacitor may be coupled to a gate of the drive transistor. A pixel with a liquid crystal portion may have a storage capacitor coupled to a given one of the electrodes in that pixel. Switching circuitry in each pixel may be used to load data from a data line into the storage capacitor of the pixel. The switching circuitry may include a semiconducting-oxide transistor coupled to an associated data line and a series-connected silicon transistor that is coupled to the storage capacitor.
Abstract:
An electronic device may have a flexible display. The display may have portions that are bent along a bend axis. The display may have display circuitry such as an array of display pixels in an active area and signal lines, thin-film transistor support circuitry and other display circuitry in an inactive area of the display surrounding the active area. The display circuitry may be formed on a substrate such as a flexible polymer substrate. The flexible polymer substrate may be formed by depositing polymer on a support structure that has raised portions. The raised portions may create locally thinned regions in the flexible polymer substrate. The reduced thickness of the flexible polymer substrate in the thinned regions may help ensure that a neutral stress plane that is associated with bending the display along the bend axis is aligned with the display circuitry, thereby minimizing stress in the display circuitry.
Abstract:
A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.
Abstract:
A thin-film transistor having a protection layer for a planarization layer. The protection layer prevents reduction of the planarization layer during an ashing process, thereby preventing the formation of a steeply tapered via hole through the planarization layer. In this manner, the via hole may be coated with a conductive element that may serve as a conductive path between a common electrode and the drain of the transistor.
Abstract:
A method is provided for fabricating a back channel etching (BCE) oxide thin film transistor (TFT) for a liquid crystal display. The method includes forming a first metal layer having a first portion and a second portion over a substrate, depositing a gate insulator over the first metal layer, and disposing a semiconductor layer over the gate insulator. The method also includes depositing a half-tone photoresist to cover a first portion of the semiconductor layer and the first portion of the first metal layer. The half-tone photoresist has a first portion and a second portion thicker than the first portion. The first portion has a via hole above the second portion of the first metal layer. The second portion of the half-tone photoresist covers the first portion of the first metal layer. The method further includes etching a portion of the gate insulator through the via hole such that the second portion of the first metal layer is exposed, removing the first portion of the half-tone photoresist while remaining the second portion of the half-tone photoresist, and etching to remove a second portion of the semiconductor layer that is not covered by the half-tone photoresist.