公开(公告)号：US20190169746A1

公开(公告)日：2019-06-06

申请号：US16050011

申请日：2018-07-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan LIU

IPC: C23C16/455

Abstract: The present disclosure relates to a gas mixing device and a method, and a CVD apparatus including the gas mixing device. The gas mixing device includes: an inlet; a mixing tube in communication with the inlet, an inner wall of the mixing tube being formed with a spiral structure such that gases entering the mixing tube are rotatably travelling along the spiral structure and mixed; and an outlet through which the mixed gases in the mixing tube outflow.

公开(公告)号：US20190058012A1

公开(公告)日：2019-02-21

申请号：US16008493

申请日：2018-06-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhen SONG ,  Guoying WANG ,  Fengjuan LIU

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: An OLED display panel includes a cover and a backplane, a plurality of color filter (CF) units are arranged in an array on the cover; auxiliary cathodes are filled into gaps among the CF units; the auxiliary cathodes include a black matrix, a buffer layer and a metal layer; a planarization layer is disposed on the auxiliary cathodes and the CF units; a plurality of openings are disposed in the planarization layer at locations corresponding to the auxiliary cathodes; a plurality of spacers are disposed on the planarization layer at locations corresponding to the auxiliary cathodes; the spacers abut against and support the cover and the backplane; a transparent electrode layer is disposed on the planarization layer and the spacers and is communicated with the auxiliary cathodes via the openings; and the plurality of CF units of the cover and pixel regions of the backplane are oppositely arranged.

公开(公告)号：US20240234532A1

公开(公告)日：2024-07-11

申请号：US17925222

申请日：2021-12-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hehe HU ,  Dongfang WANG ,  Fengjuan LIU ,  Ce NING ,  Zhengliang LI ,  Jiayu HE ,  Yan QU ,  Kun ZHAO ,  Jie HUANG ,  Liping LEI ,  Yunsik IM ,  Shunhang ZHANG ,  Nianqi YAO ,  Feifei LI

IPC: H01L29/43 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/435 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/66742

Abstract: The present disclosure provides a TFT, a manufacturing method and a display substrate, and it relates to the field of TFT technology. The TFT includes: a base substrate; a gate electrode arranged on the base substrate; an active layer arranged at a side of the gate electrode away from the base substrate, an orthogonal projection of the active layer onto the base substrate overlapping with an orthogonal projection of the gate electrode onto the base substrate; and a source electrode and a drain electrode arranged at a side of the active layer away from the base substrate and coupled to the active layer. A resistance between the gate electrode and the drain electrode is greater than a resistance between the gate electrode and the source electrode. According to the present disclosure, it is able to increase a withstand voltage range of the TFT.

公开(公告)号：US20240212773A1

公开(公告)日：2024-06-27

申请号：US17909129

申请日：2021-10-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Fengjuan LIU ,  Ce NING ,  Wei LIU ,  Dini XIE ,  Yuhang LU

IPC: G11C19/28 ,  G09G3/20

CPC classification number: G11C19/28 ,  G09G3/2092 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2310/0286

Abstract: The present disclosure provides a shift register unit, and driving method therefor, a gate drive circuit, and a display device, belonging to the field of display technologies. The shift register unit includes an input circuit, a compensation control circuit, and an output circuit. The input circuit can control a potential of a first node under control of an input signal provided by an input signal terminal and control a potential of a reference node under control of the input signal and an input control signal provided by an input control terminal. The compensation control circuit can adjust the potential of the first node based on the potential of the reference node under control of a first clock signal provided by a first clock signal terminal. In this way, the flexibility of controlling the first node is improved. Thus, the output circuit can flexibly output a drive signal to an output terminal coupled to a gate line under control of the first node.

公开(公告)号：US20210328071A1

公开(公告)日：2021-10-21

申请号：US16618941

申请日：2019-05-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan LIU ,  Donghui YU

IPC: H01L29/786 ,  H01L29/66 ,  H01L51/56 ,  H01L27/32

Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a fabrication method thereof are disclosed. The thin film transistor includes: a base substrate; a gate electrode, an active layer, a source electrode and a drain electrode on the base substrate; and the thin film transistor further includes: a light-shielding portion between the active layer and the base substrate, the light-shielding portion includes a groove, and the active layer is in the groove.

公开(公告)号：US20150311223A1

公开(公告)日：2015-10-29

申请号：US14406326

申请日：2014-05-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan LIU ,  Meili WANG ,  Li ZHANG ,  Liangchen YAN

IPC: H01L27/12 ,  H01L21/283 ,  H01L21/308 ,  H01L29/417 ,  H01L29/40 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L27/124 ,  H01L21/28008 ,  H01L21/283 ,  H01L21/3081 ,  H01L27/1259 ,  H01L29/401 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869

Abstract: A thin film transistor array substrate and a manufacturing method thereof, and a display device comprising the thin film transistor array substrate, including a gate electrode (4) within a gate electrode recess of a first insulating layer (2), so that the gate electrode (4) is surrounded by the first insulating layer (2), the patterned gate electrode (4) has no slope, and the first insulating layer (2) isolates the gate electrode (4) from the outside, which can prevent fracture of the gate insulating layer (5), and further effectively block copper diffusion in the thin film transistor array substrate. Further, the metal blocking layer completely covers an upper surface and/or a lower surface of the composite copper metal or the composite thin film layer including copper metal, which can play a good role in blocking copper diffusion; meanwhile, above all, it is not necessary to etch copper, which reduces cost and improves yield.

Abstract translation: 一种薄膜晶体管阵列基板及其制造方法，以及包括薄膜晶体管阵列基板的显示装置，其包括在第一绝缘层（2）的栅电极凹部内的栅电极（4），使得栅电极 （4）被第一绝缘层（2）包围，图案化栅电极（4）没有斜坡，第一绝缘层（2）将栅电极（4）与外部隔离，这可以防止 栅极绝缘层（5），并进一步有效地阻挡薄膜晶体管阵列基板中的铜扩散。 此外，金属阻挡层完全覆盖复合铜金属或包含铜金属的复合薄膜层的上表面和/或下表面，其可以在阻止铜扩散方面发挥良好的作用; 同时，最重要的是，不需要蚀刻铜，从而降低成本并提高产量。

公开(公告)号：US20250098212A1

公开(公告)日：2025-03-20

申请号：US18963664

申请日：2024-11-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie HUANG ,  Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Fengjuan LIU ,  Nianqi YAO ,  Kun ZHAO ,  Tianmin ZHOU ,  Jiushi WANG ,  Zhongpeng TIAN

IPC: H01L29/786 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/66

Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include at least one of indium, gallium and zinc. Praseodymium is doped into the channel layer. And, in the channel layer, a number density of praseodymium atoms in the channel layer gradually decreases with a distance from the first protection layer.

公开(公告)号：US20250031465A1

公开(公告)日：2025-01-23

申请号：US18034094

申请日：2021-12-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Pengfei GU ,  Je HUANG ,  Feifei LI ,  Yuhang LU ,  Rui HUANG ,  Fengjuan LIU

IPC: H01L27/146

Abstract: A photoelectric sensor and a substrate are disclosed. The photoelectric sensor includes a photoelectric conversion layer, a first electrode and a second electrode, wherein the first electrode is arranged on a side of the photoelectric conversion layer, and the second electrode is arranged on a side of the photoelectric conversion layer and is spaced apart from the first electrode; wherein the first electrode and the second electrode are configured to drive the photoelectric conversion layer; and in a direction perpendicular to a surface of the photoelectric conversion layer, the first electrode and the second electrode are overlapped with the photoelectric conversion layer respectively, and the photoelectric conversion layer includes an oxide semiconductor material.

公开(公告)号：US20240371887A1

公开(公告)日：2024-11-07

申请号：US18773582

申请日：2024-07-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yuhang LU ,  Fengjuan LIU ,  Hehe HU ,  Zhengliang LI ,  Ce NING ,  Guangcai YUAN ,  Dandan ZHOU ,  Cheng XU

IPC: H01L27/12 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  H01L25/075 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121

Abstract: A thin film transistor includes a first active layer, a second active layer, a first electrode, a second electrode and a third electrode. The first active layer includes a first surface away from a substrate. The second active layer includes a second surface in contact with the first surface. The first electrode, the first active layer and the second active layer have an overlapping region. The second electrode, the first active layer and the second active layer have an overlapping region. The third electrode, the first active layer and the second active layer have an overlapping region, and the third electrode is opposite to the second electrode. The second surface is located within the first surface, and a distance between at least part of a border of the second surface and a border of the first surface is less than or equal to 0.5 μm.

公开(公告)号：US20240329478A1

公开(公告)日：2024-10-03

申请号：US18638710

申请日：2024-04-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangcai YUAN ,  Hehe HU ,  Ce NING ,  Hui GUO ,  Fengjuan LIU ,  Dongfang WANG ,  Zhengliang LI ,  Jiayu HE

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/136295 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1259

Abstract: An array substrate and a manufacturing method therefor, and a display apparatus are provided. The array substrate includes an underlay substrate, and at least one first transistor, at least one data line and at least one pixel electrode disposed on the underlay substrate. The at least one first transistor includes a first active layer and a first gate; the first gate is located on a side of the first active layer away from the underlay substrate, and orthographic projections of the first gate and the first active layer on the underlay substrate are at least partially overlapped. The first active layer is electrically connected to the data line and the pixel electrode, respectively. The data line is located on a side of the first active layer close to the underlay substrate, and the pixel electrode is located on a side of the first gate away from the underlay substrate.