公开(公告)号：US20250031447A1

公开(公告)日：2025-01-23

申请号：US18279205

申请日：2022-10-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhengliang LI ,  Guangcai YUAN ,  Ce NING ,  Zhonghao HUANG ,  Zhixiang ZOU ,  Zhangtao WANG ,  Jie HUANG ,  Nianqi YAO ,  Jiayu HE ,  Hehe HU ,  Feifei LI ,  Kun ZHAO ,  Chen XU ,  Hui GUO

IPC: H01L27/12 ,  H01L23/00

Abstract: A display substrate, including: a base substrate; and a metal conductive layer, located at a side of the base substrate, and including a core conductive layer and a functional conductive layer laminated along a direction away from the base substrate; a material of the core conductive layer includes a conductive metal material; a material of the functional conductive layer includes a first diffusion barrier metal material and a first adhesion force enhancing metal material, wherein the first diffusion barrier metal material is configured to block diffusion of the conductive metal material, and the first adhesion force enhancing metal material is configured to enhance an adhesion force between the functional conductive layer and a photoresist used in a patterning process of the functional conductive layer; a surface energy of any of first adhesion force enhancing metal materials is less than or equal to 325 mJ/m2.

公开(公告)号：US20240274674A1

公开(公告)日：2024-08-15

申请号：US18021778

申请日：2022-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie HUANG ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Niangi YAO ,  Kun ZHAO ,  Feifei LI

IPC: H01L29/417 ,  H01L29/423

CPC classification number: H01L29/41733 ,  H01L29/42384

Abstract: Provided are a thin film transistor, a display substrate and a display device, the thin film transistor includes: a gate on a base substrate; an active layer between the gate and the base substrate, the active layer includes a source contact portion, a drain contact portion and a middle portion therebetween, orthographic projections of the middle portion and the gate on the base substrate overlaps to form a first overlapping region, a material of the middle portion includes a metal oxide containing a doped element, a dissociation energy of the doped element from an oxygen element is greater than 500 Kj/mol; a source connected to the source contact portion and a drain connected to the drain contact portion, a ratio of an area of the orthographic projection of the gate on the base substrate to an area of the first overlapping region is less than or equal to 3.

公开(公告)号：US20220223773A1

公开(公告)日：2022-07-14

申请号：US17465689

申请日：2021-09-02

Applicant: BOE Technology Group Co., Ltd.

Inventor： Song LIU ,  Zhengliang LI ,  Kun ZHAO ,  Feifei LI ,  Qi QI

IPC: H01L33/62 ,  H01L25/075 ,  H01L33/56

Abstract: Disclosed are a light-emitting substrate and a display device. In the light-emitting substrate, a first pad of a light-emitting area includes a first metal layer located above a base substrate and a second metal layer located on a side, facing away from the base substrate, of the first metal layer. A material of the second metal layer includes copper-nickel-titanium alloy, and a quantity of nickel atoms and/or titanium atoms contained per unit area in a cross section, farther from the base substrate, of the second metal layer is greater than a quantity of nickel atoms and/or titanium atoms contained per unit area in another cross section, closer to the base substrate, of the second metal layer.

公开(公告)号：US20250098064A1

公开(公告)日：2025-03-20

申请号：US18552754

申请日：2022-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Kun ZHAO ,  Ce NING ,  Zhengliang LI ,  Zhanfeng CAO ,  Ke WANG ,  Jiaxiang ZHANG ,  Qi QI ,  Hehe HU ,  Feifei LI ,  Jie HUANG ,  Jiayu HE

IPC: H05K1/02 ,  G02F1/1335 ,  G02F1/13357 ,  H05K1/11 ,  H05K3/28

Abstract: A circuit board includes a substrate, a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer includes a plurality of first conductive portions. The second conductive layer includes a plurality of second conductive portions. A second conductive portion passes through a first via hole in the first insulating layer to be in electrical contact with a first conductive portion. The first conductive layer and the second conductive layer each include at least one main conductive layer, which is capable of creating a first intermetallic compound with solder. At least one of the first conductive layer and the second conductive layer further includes a stop layer capable of creating a second intermetallic compound with the solder. A rate of a reaction between the stop layer and the solder is lower than a rate of a reaction between the main conductive layer and the solder.

公开(公告)号：US20240234532A1

公开(公告)日：2024-07-11

申请号：US17925222

申请日：2021-12-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hehe HU ,  Dongfang WANG ,  Fengjuan LIU ,  Ce NING ,  Zhengliang LI ,  Jiayu HE ,  Yan QU ,  Kun ZHAO ,  Jie HUANG ,  Liping LEI ,  Yunsik IM ,  Shunhang ZHANG ,  Nianqi YAO ,  Feifei LI

IPC: H01L29/43 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/435 ,  H01L27/1214 ,  H01L29/41733 ,  H01L29/66742

Abstract: The present disclosure provides a TFT, a manufacturing method and a display substrate, and it relates to the field of TFT technology. The TFT includes: a base substrate; a gate electrode arranged on the base substrate; an active layer arranged at a side of the gate electrode away from the base substrate, an orthogonal projection of the active layer onto the base substrate overlapping with an orthogonal projection of the gate electrode onto the base substrate; and a source electrode and a drain electrode arranged at a side of the active layer away from the base substrate and coupled to the active layer. A resistance between the gate electrode and the drain electrode is greater than a resistance between the gate electrode and the source electrode. According to the present disclosure, it is able to increase a withstand voltage range of the TFT.

公开(公告)号：US20240332425A1

公开(公告)日：2024-10-03

申请号：US18028009

申请日：2022-03-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Fangqing WEN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Kun ZHAO ,  Zhengliang LI ,  Jie HUANG ,  Feifei LI ,  Yan QU ,  Liping LEI

IPC: H01L29/786 ,  H01L25/07

CPC classification number: H01L29/7869 ,  H01L25/074

Abstract: The present disclosure provides a metal oxide thin film transistor, a semiconductor device and a display device, belongs to the field of display technology, and can solve a problem that current metal oxide thin film transistors have a poor stability. The metal oxide thin film transistor of the present disclosure includes a substrate and a first metal oxide semiconductor layer on the substrate; a material of the first metal oxide semiconductor layer includes a metal oxide doped with a first metal element, an electronegativity difference value between the first metal element and an oxygen element is greater than or equal to an electronegativity difference value between a metal element in the metal oxide and the oxygen element.

公开(公告)号：US20240304698A1

公开(公告)日：2024-09-12

申请号：US18028114

申请日：2022-03-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiayu HE ,  Yan QU ,  Liping LEI ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Kun ZHAO ,  Feifei LI

IPC: H01L29/49 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/4908 ,  G02F1/1368 ,  H01L27/1225 ,  H01L29/7869 ,  H01L29/78696

Abstract: There is provided a metal oxide thin film transistor, including: a substrate and a metal oxide semiconductor layer on the substrate; a gate and a gate insulating layer between the substrate and the metal oxide semiconductor layer; the gate insulating layer includes a first silicon nitride layer, a second silicon nitride layer and a first silicon oxide layer which are stacked; the first silicon oxide layer is in contact with the metal oxide semiconductor layer, and two surfaces of the second silicon nitride layer are in contact with the first silicon nitride layer and the first silicon oxide layer, respectively; a content of hydrogen atoms of at least a partial region of the second silicon nitride layer is less than 30% of a content of hydrogen atoms of at least a partial region of the first silicon nitride layer. An array substrate and a display device are further provided.

公开(公告)号：US20240297255A1

公开(公告)日：2024-09-05

申请号：US17919301

申请日：2021-11-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jie HUANG ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jiayu HE ,  Nianqi YAO ,  Kun ZHAO ,  Feifei LI ,  Liping LEI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/66969

Abstract: The present disclosure provides a thin film transistor, a method for manufacturing the thin film transistor, an array substrate and a display panel. The thin film transistor includes: a substrate; and a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode on the substrate, wherein the active layer includes a first semiconductor layer and a second semiconductor layer sequentially arranged in a direction perpendicular to the substrate, the second semiconductor layer is arranged on a side of the first semiconductor layer away from the gate electrode; an absolute value of a difference between conduction band minimums of a first oxide material and a second oxide material is greater than 0.2 eV.

公开(公告)号：US20250031465A1

公开(公告)日：2025-01-23

申请号：US18034094

申请日：2021-12-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Pengfei GU ,  Je HUANG ,  Feifei LI ,  Yuhang LU ,  Rui HUANG ,  Fengjuan LIU

IPC: H01L27/146

Abstract: A photoelectric sensor and a substrate are disclosed. The photoelectric sensor includes a photoelectric conversion layer, a first electrode and a second electrode, wherein the first electrode is arranged on a side of the photoelectric conversion layer, and the second electrode is arranged on a side of the photoelectric conversion layer and is spaced apart from the first electrode; wherein the first electrode and the second electrode are configured to drive the photoelectric conversion layer; and in a direction perpendicular to a surface of the photoelectric conversion layer, the first electrode and the second electrode are overlapped with the photoelectric conversion layer respectively, and the photoelectric conversion layer includes an oxide semiconductor material.

公开(公告)号：US20240355978A1

公开(公告)日：2024-10-24

申请号：US18254210

申请日：2022-04-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Zhongpeng TIAN ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Jiayu HE ,  Feifei LI ,  Kun ZHAO ,  Yimin CHEN

IPC: H01L33/62 ,  G02F1/13357 ,  H05K3/46

CPC classification number: H01L33/62 ,  G02F1/133603 ,  H05K3/4688

Abstract: A circuit board includes a substrate and a stress neutral layer disposed on a side of the substrate. The stress neutral layer includes one or more first metal layers and one or more second metal layers. The one or more second metal layers and the one or more first metal layers are stacked. At least one of the one or more first metal layers is made of a material for generating a tensile stress, and at least one of the one or more second metal layers is made of a material for generating a compressive stress.