公开(公告)号：US20240421047A1

公开(公告)日：2024-12-19

申请号：US18630326

申请日：2024-04-09

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hiroshi ISHINO

IPC: H01L23/495 ,  H01L23/31

Abstract: A semiconductor module includes a first module and a second module. The first module and the second module are connected to each other by connecting terminals thereof. The first module and the second module are disposed to face each other in a thickness direction of the first module, and a direction of a current path in the first module is opposite to a direction of a current path in the second module.

公开(公告)号：US20210057389A1

公开(公告)日：2021-02-25

申请号：US17093777

申请日：2020-11-10

Applicant: DENSO CORPORATION

Inventor： Hiroshi ISHINO

IPC: H01L25/07 ,  H01L23/367 ,  H01L23/00

Abstract: The semiconductor device includes a semiconductor element, a first conductive member, a second conductive member, an insulating member, a first main terminal, and a second main terminal. The first main terminal and the second main terminal, respectively, extend from the first conductive member and the second conductive member. The first main terminal and the second main terminal, respectively, have a first projecting portion and a second projecting portion projecting outside of the insulating member. The first projecting portion and the second projecting portion, respectively, have a first facing portion and a second facing portion at which plate surfaces of the first and second projecting portions face each other across a gap, and a first non-facing portion and a second non-facing portion at which the plate surfaces of the first and second projecting portions do not face each other.

公开(公告)号：US20230411260A1

公开(公告)日：2023-12-21

申请号：US18181618

申请日：2023-03-10

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Kazuki KUWATA ,  Hiroshi ISHINO ,  Hirokazu SAMPEI ,  Masaru NARIKAWA

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L23/49811 ,  H01L23/49838 ,  H01L21/565 ,  H01L23/293 ,  H01L23/3114

Abstract: In a semiconductor module, first and second connection terminals and a control terminal are electrically connected to a semiconductor chip. The second connection terminal extends in a first direction in a resin molded part and projects from a predetermined surface of the resin molded part. An internal terminal of the first connection terminal extends in the resin molded part along the first direction and overlaps with the second connection terminal with a predetermined space therebetween in a second direction, and is exposed from an opening portion of the resin molded part. An external terminal of the first connection terminal is connected to the internal terminal at the opening portion and projects outside the resin molded part. The first connection terminal includes a tie bar remaining portion extending from the internal terminal in a direction that intersects the first direction and the second direction.

公开(公告)号：US20230378031A1

公开(公告)日：2023-11-23

申请号：US18181679

申请日：2023-03-10

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hiroshi ISHINO ,  Katsuya KUMAGAI ,  Masaru NARIKAWA

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49555 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/182

Abstract: A semiconductor module includes a semiconductor chip, a resin molded part, and a connection terminal electrically connected to the semiconductor chip. The connection terminal includes an internal terminal sealed in the resin molded part, an external terminal, and a tie bar remaining portion. The internal terminal is extended in a first direction and exposed from an opening portion of the resin molded part. The external terminal is connected to the internal terminal through the opening portion, and projected outside the resin molded part. The tie bar remaining portion extends from the internal terminal in a second direction intersecting the first direction and projects outside the resin molded part to provide a tie bar projecting portion. The connection terminal has a groove portion covered with the resin molded part, between an exposed portion of the internal terminal and the tie bar projecting portion.

公开(公告)号：US20170162464A1

公开(公告)日：2017-06-08

申请号：US15308627

申请日：2015-05-21

Applicant: DENSO CORPORATION

Inventor： Tomoo MORINO ,  Hiroshi ISHINO

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/31 ,  H01L23/00 ,  H01L29/16 ,  H01L29/04

CPC classification number: H01L23/3675 ,  H01L23/3107 ,  H01L23/3736 ,  H01L23/48 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L29/045 ,  H01L29/1608 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/33181 ,  H01L2224/371 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/0665 ,  H01L2924/10162 ,  H01L2924/10272 ,  H01L2924/1203 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor device includes a semiconductor chip formed using a silicon carbide and having electrodes on a first surface and a second surface opposite to the first surface, a terminal disposed adjacent to the first surface and connected to the electrode on the first surface through a bonding member, and a heat sink disposed adjacent to the second surface and connected to the electrode on the second surface through a bonding member. The first surface is a (0001) plane and a thickness direction of the semiconductor chip corresponds to a [0001] direction. Of the distances between the end portions of the semiconductor chip having a square two-dimensional shape and the end portions of the terminal having a rectangular two-dimensional shape, the shortest distance L1 in a [1-100] direction is shorter than the shortest distance L2 in a [11-20] direction.

公开(公告)号：US20240347521A1

公开(公告)日：2024-10-17

申请号：US18594334

申请日：2024-03-04

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Yoshitaka KATO ,  Takeshi ENDO ,  Hiroshi ISHINO

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/31 ,  H01L23/42

CPC classification number: H01L25/162 ,  H01L23/42 ,  H01L23/3121 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/29139 ,  H01L2224/32225 ,  H01L2224/33181

Abstract: A semiconductor device includes a semiconductor module, a wiring substrate, a sealing member, and a thermal diffusion plate. The semiconductor module includes a semiconductor chip in which a semiconductor element is disposed. The wiring substrate is electrically connected to the semiconductor module. The sealing member seals the semiconductor module and the wiring substrate. The thermal diffusion plate is disposed between the semiconductor module and the wiring substrate, and has a thermal conductivity higher than a thermal conductivity of the sealing member. The thermal diffusion plate has a plate shape and is disposed in the sealing member in a state where a plane direction of the thermal diffusion plate is along a direction intersecting an arrangement direction of the semiconductor module and the wiring substrate.

公开(公告)号：US20240304560A1

公开(公告)日：2024-09-12

申请号：US18520743

申请日：2023-11-28

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Kazuki KUWATA ,  Hiroshi ISHINO ,  Takeshi ENDO ,  Yoshitaka KATO

IPC: H01L23/538 ,  H01L21/56 ,  H01L21/60 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16

CPC classification number: H01L23/5386 ,  H01L21/56 ,  H01L21/60 ,  H01L23/3121 ,  H01L24/81 ,  H01L24/95 ,  H01L25/16 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/95 ,  H01L2924/10272 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1426

Abstract: A semiconductor device includes a first lead wire connected to a first connection target; a second lead wire connected to a second connection target; and a sealing resin that seals the first connection target, the second connection target, the first lead wire, and the second lead wire. The first lead wire includes a first connection portion connected to the first connection target, a first top portion exposed from the sealing resin, and a first standing portion connecting the first connection portion and the first top portion. The second lead wire includes a second connection portion connected to the second connection target, a second top portion exposed from the sealing resin, and a second standing portion connecting the second connection portion and the second top portion. The first top portion and the second top portion are disposed to face each other.

公开(公告)号：US20160126167A1

公开(公告)日：2016-05-05

申请号：US14956474

申请日：2015-12-02

Applicant: DENSO CORPORATION

Inventor： Hiroshi ISHINO ,  Tomokazu WATANABE

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/49562 ,  H01L21/4825 ,  H01L21/4871 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/4006 ,  H01L23/4334 ,  H01L23/473 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/49568 ,  H01L23/49575 ,  H01L25/072 ,  H01L2224/06181 ,  H01L2224/32245 ,  H01L2224/3754 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A semiconductor module is configured such that heat radiation substrates are connected to lead frames and semiconductor chips are directly connected to the lead frames, so that the semiconductor chips are not connected to the lead frames through conductive portions of the heat radiation substrates. Therefore, the conductive portions can have a solid shape without being divided. As such, an occurrence of curving of the heat radiation substrates is suppressed when a temperature is reduced from a high temperature to a room temperature after resin-sealing at the high temperature or the like. Therefore, connection between the semiconductor chip and the lead frames and connection between the lead frames and the heat radiation substrates enhance.

Abstract translation: 半导体模块被配置为使得散热基板连接到引线框架，并且半导体芯片直接连接到引线框架，使得半导体芯片不通过散热基板的导电部分连接到引线框架。 因此，导电部分可以具有不分割的实心形状。 因此，当在高温等树脂密封后温度从高温降低至室温时，抑制了放热基板弯曲的发生。 因此，半导体芯片和引线框架之间的连接以及引线框架和散热基板之间的连接增强。

公开(公告)号：US20220068772A1

公开(公告)日：2022-03-03

申请号：US17392446

申请日：2021-08-03

Applicant: DENSO CORPORATION

Inventor： Hiroshi ISHINO ,  Hirokazu SAMPEI

IPC: H01L23/495 ,  H01L23/00

Abstract: In a semiconductor device, a first lead frame and a second lead frame are fixed to a metal conductor base by an organic insulating film made of a polyimide-based material. The organic insulating film satisfies relationships of tpress1>tcast1 and tpress2>tcast1, where tpress1 is a thickness of a portion of the organic insulating film sandwiched between the metal conductor base and the first lead frame, tpress2 is a thickness of a portion of the organic insulating film sandwiched between the metal conductor base and the second lead frame, and tcast1 is a thickness of a portion of the organic insulating film that is not sandwiched between the metal conductor base and the first lead frame and is not sandwiched between the metal conductor base and the second lead frame.

公开(公告)号：US20210407892A1

公开(公告)日：2021-12-30

申请号：US17469303

申请日：2021-09-08

Applicant: DENSO CORPORATION

Inventor： Hiroshi ISHINO ,  Ryota MIWA ,  Shoichiro OMAE ,  Takuo NAGASE

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/50

Abstract: A semiconductor module includes: a semiconductor element having a first main electrode and a second main electrode; a first conductive member and a second conductive member connected to the first main electrode and the second main electrode, respectively, and placed to sandwich the semiconductor element; and a main terminal including a first main terminal continuous from the first conductive member and a second main terminal continuous from the second conductive member. The main terminal has a facing portion, a non-facing portion, a first connection portion, and a second connection portion. In a width direction, a formation position of the second connection portion overlaps with a formation position of the first connection portion.