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公开(公告)号：US20170018400A1
公开(公告)日：2017-01-19
申请号：US15195214
申请日：2016-06-28
Inventor： Young Kyun CHO , Cheol Ho KIM , Bong Hyuk PARK
IPC: H01J37/24 , H01J37/147 , H01L29/868
CPC classification number: H01J37/243 , H01J37/147 , H01Q1/366 , H01Q19/12 , H01Q19/18
Abstract: Provided is a semiconductor plasma antenna apparatus. The apparatus includes: a cell array unit in which a plurality of PIN diode cells are arranged, and in which a cell pattern is formed by using a predefined PIN diode cell among the plurality of PIN diode cells; and a driver circuit unit configured to control a drive of the predefined PIN diode cell, wherein the driver circuit unit comprises: a direct-current conversion unit equipped with a DC-DC converter configured to drive a diode load of the cell pattern by applying an output voltage to a PIN diode cell corresponding to the cell patterns formed in the cell array unit; and a constant current controller configured to controlling a plasma concentration of the PIN diode cell by controlling a constant current for the diode load of the cell pattern.
Abstract translation: 提供了一种半导体等离子体天线装置。 该装置包括：单元阵列单元，其中布置有多个PIN二极管单元，并且其中通过在多个PIN二极管单元中使用预定义的PIN二极管单元形成单元图案; 以及驱动器电路单元，被配置为控制所述预定义PIN二极管单元的驱动，其中所述驱动器电路单元包括：配备有DC-DC转换器的直流转换单元，所述DC-DC转换器被配置为通过施加所述DC二极管单元驱动所述单元图案的二极管负载 对与形成在单元阵列单元中的单元图案对应的PIN二极管单元的输出电压; 以及恒流控制器，其被配置为通过控制所述电池图案的二极管负载的恒定电流来控制所述PIN二极管单元的等离子体浓度。
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公开(公告)号：US20140064355A1
公开(公告)日：2014-03-06
申请号：US14011268
申请日：2013-08-27
Inventor： Young Kyun CHO , Sung Jun LEE , Seung Hyun JANG , Bong Hyuk PARK , Jae Ho JUNG , Kwang Chun LEE
CPC classification number: H04L25/4902 , H03K7/08 , H03M3/504 , H04B14/062
Abstract: A delta-sigma modulator and a transmitter apparatus including the same are disclosed. The delta-sigma modulator includes a first integrator, a second integrator, a first comparator configured to compare an output signal of the second integrator and a reference signal, and output a first comparison signal, a second comparator configured to compare the output signal of the second integrator and the reference signal, and output a second comparison signal, a first DAC configured to output the first signal corresponding to the first comparison signal and the second comparison signal, a second DAC configured to output the second signal corresponding to the first comparison signal and the second comparison signal, a delayer configured to generate a delayed signal that delays the first comparison signal and the second comparison signal by a predetermined time, and an output DAC configured to generate an output signal having a multi-level corresponding to the delayed signal.
Abstract translation: 公开了一种Δ-Σ调制器及其发射机装置。 Δ-Σ调制器包括第一积分器，第二积分器，被配置为比较第二积分器的输出信号和参考信号的第一比较器，并输出第一比较信号;第二比较器，被配置为比较第二积分器的输出信号 第二积分器和参考信号，并输出第二比较信号，第一DAC被配置为输出对应于第一比较信号和第二比较信号的第一信号;第二DAC，被配置为输出对应于第一比较信号的第二信号 和第二比较信号，延迟器，被配置为产生将第一比较信号和第二比较信号延迟预定时间的延迟信号;以及输出DAC，被配置为产生具有与延迟信号相对应的多电平的输出信号 。
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3.发明申请LOOP FILTER FOR DATA CONVERTER IN WIRELESS COMMUNICATION SYSTEM AND METHOD OF IMPLEMENTING CORRESPONDING LOOP FILTER 有权无线通信系统中数据转换器的环路滤波器及实现相关环路滤波器的方法公开(公告)号：US20160269043A1
公开(公告)日：2016-09-15
申请号：US15057793
申请日：2016-03-01
Inventor： Young Kyun CHO , Bong Hyuk PARK , Jung Hoon OH
IPC: H03M3/00
CPC classification number: H03M3/44 , G06G7/18 , H03H11/0433 , H03H11/1252 , H03H11/126 , H03M3/438 , H03M3/458
Abstract: Provided is a loop filter for a data converter in a wireless communication system that improves both an anti-aliasing filtering characteristic and a power consumption characteristic, the loop filter including first and third resistors sequentially connected to an input end, fourth and second resistors sequentially connected to between an inverting output end and ground, a first capacitor connected to between another end of the first resistor and one end of the fourth resistor, a second capacitor connected to between the one end of the fourth resistor and the output end, a third capacitor connected to between another end of the third resistor and the output end, and an operational amplifier, wherein an inverting end of the operational amplifier is connected to the other end of the first resistor and a non-inverting end of the operational amplifier is connected to ground to output an operational amplifier response to the output end.
Abstract translation: 提供了一种用于无线通信系统中的数据转换器的环路滤波器，其改进了抗混叠滤波特性和功耗特性，该环路滤波器包括顺序地连接到输入端的第一和第三电阻器，第四和第二电阻器顺序地连接 连接到所述第一电阻器的另一端和所述第四电阻器的一端之间的第一电容器，连接到所述第四电阻器的一端和所述输出端之间的第二电容器，第三电容器 连接到第三电阻器的另一端和输出端之间，以及运算放大器，其中运算放大器的反相端连接到第一电阻器的另一端，并且运算放大器的非反相端连接到 接地以输出对输出端的运算放大器响应。
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4.发明申请SECOND ORDER LOOP FILTER AND MULTI-ORDER DELTA SIGMA MODULATOR INCLUDING THE SAME 有权第二订单循环滤波器和包括其中的多阶段三角形调制器公开(公告)号：US20150229292A1
公开(公告)日：2015-08-13
申请号：US14617705
申请日：2015-02-09
Inventor： Young Kyun CHO , Jae Ho JUNG , Kwangchun LEE
CPC classification number: H03M3/43 , H03H11/1247 , H03H11/126 , H03H11/1291 , H03H11/32 , H03M3/38 , H03M3/422 , H03M3/454 , H03M3/458
Abstract: Provided is a second order loop filter (LF). The second order LF includes: an operational amplifier including a first input, a second input receiving a differential input of the first input, and an output; an inverter inverting a signal output from the output of the operational amplifier to output an inverted signal; a first resistor connected to between the first input and a first node; a second resistor connected to between the output of the operational amplifier and the first node; a third resistor connected to between the first input and an input signal; a first capacitor connected to between the second input and the first node; a second capacitor connected to between the output of the operational amplifier and an output of the inverter; and a third capacitor connected to between the output and the first input of the operational amplifier, wherein the second input is connected to a ground voltage.
Abstract translation: 提供了二阶环路滤波器（LF）。 第二级LF包括：运算放大器，包括第一输入端，接收第一输入端的差分输入端的第二输入端和输出端; 逆变器，反相从运算放大器的输出端输出的信号，输出反相信号; 连接到第一输入和第一节点之间的第一电阻器; 连接到运算放大器的输出端和第一节点之间的第二电阻器; 连接到所述第一输入端和输入信号之间的第三电阻器; 连接到所述第二输入端和所述第一节点之间的第一电容器; 连接在运算放大器的输出端和反相器的输出端之间的第二电容器; 以及连接到所述运算放大器的输出和第一输入之间的第三电容器，其中所述第二输入端连接到接地电压。
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5.发明申请公开(公告)号：US20150215147A1
公开(公告)日：2015-07-30
申请号：US14595653
申请日：2015-01-13
Inventor： Seunghyun JANG , Young Kyun CHO , Sung Jun LEE , Bong Hyuk PARK , JAE HO JUNG , Kwangchun LEE
CPC classification number: H04L27/2627 , H03F1/3247 , H03F3/24 , H04L25/4902 , H04L25/4923 , H04L27/20 , H04L27/368
Abstract: Provided is a signal transmission device including a first modulation unit generating a first modulated signal having at least three logic levels by modulating an input signal; a characteristic adjustment unit generating an adjusted first modulated signal by adjusting the at least one of electrical characteristic values based on an adjustment signal; a second modulation unit generating a second modulated signal by modulating the adjusted first modulated signal; and an adjustment operation unit generating the adjustment signal based on electrical characteristic values respectively corresponding to the at least three logic levels of the first modulated signal and corresponding to at least three logic levels of the second modulated signal. Linearity of the modulated signal generated by the provided signal transmission device is enhanced.
Abstract translation: 提供了一种信号传输设备，包括：第一调制单元，通过调制输入信号产生具有至少三个逻辑电平的第一调制信号; 特征调整单元，通过基于调整信号调整所述电特性值中的至少一个来生成经调整的第一调制信号; 第二调制单元，通过调制经调整的第一调制信号产生第二调制信号; 以及调整操作单元，其基于分别对应于所述第一调制信号的所述至少三个逻辑电平并对应于所述第二调制信号的至少三个逻辑电平的电特性值生成所述调整信号。 由提供的信号传输装置产生的调制信号的线性增强。
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Patent Agency Ranking
6.发明申请APPARATUS AND METHOD FOR CALIBRATING TIME CONSTANT, AND LOW PASS DELTA SIGMA MODULATION APPARATUS INCLUDING THE SAME 失效用于校准时间常数的装置和方法，以及包括其中的低通道三角形调制装置公开(公告)号：US20140002285A1
公开(公告)日：2014-01-02
申请号：US13715056
申请日：2012-12-14
Inventor： Young Kyun CHO , Bong Hyuk Park , Jae Ho Jung
IPC: H03M3/00
Abstract: A time constant calibration apparatus of a low pass delta sigma modulation apparatus calibrates a time constant of an integrator using a resistor and a capacitor, and the time constant calibration apparatus generates a reference voltage by flowing a reference current to a reference resistor, converts the reference voltage to a digital signal, and varies a value of a resistor of an integrator and a value of a capacitor from the digital signal.
Abstract translation: 低通量ΔΣ调制装置的时间常数校准装置使用电阻器和电容器校准积分器的时间常数，并且时间常数校准装置通过将参考电流流向参考电阻器来产生参考电压，转换参考电压 电压到数字信号，并且从数字信号改变积分器的电阻器的值和电容器的值。
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公开(公告)号：US20210153200A1
公开(公告)日：2021-05-20
申请号：US17082429
申请日：2020-10-28
Inventor： Heon Kook KWON , Kwang Seon KIM , Jung Nam LEE , JAE HO JUNG , Young Kyun CHO
Abstract: A communication method and apparatuses performing the same. The communication method includes arranging first subcarriers of a first frequency domain and second subcarriers of a second frequency domain based on a mirror point and performing communication based on an orthogonal frequency-division multiplexing (OFDM) communication scheme using at least one of the first subcarriers and the second subcarriers.
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公开(公告)号：US20190326814A1
公开(公告)日：2019-10-24
申请号：US16198398
申请日：2018-11-21
Inventor： Young Kyun CHO , Myung Don KIM , Seok Bong HYUN
Abstract: A buck-boost converter using a delta-sigma modulator (DSM) includes a buck-boost mode driving circuit configured to receive an input voltage and output an output voltage according to an operation mode, a mode controller configured to sense an output of the buck-boost mode driving circuit and determine the operation mode, and a gate driver configured to receive a mode determination signal for determining the operation mode from the mode controller and control switches included in the buck-boost mode driving circuit. Accordingly, output ripple characteristics thereof can be improved.
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公开(公告)号：US20180212619A1
公开(公告)日：2018-07-26
申请号：US15868786
申请日：2018-01-11
Inventor： Young Kyun CHO , Bong Hyuk PARK
CPC classification number: H03M3/438 , H03H11/1204 , H03H11/126 , H03H11/1291 , H03M3/422
Abstract: A delta-sigma modulator may comprise a loop filter for integrating and outputting a difference between an input signal and an analog signal; a quantizer for quantizing and outputting a signal output from the loop filter; and a digital-to-analog converter (DAC) for outputting the analog signal by digital-to-analog converting a signal output from the quantizer. Also, the loop filter may comprise an operational amplifier; and a circuit including at least one capacitor, at least one resistor, and at least one switch which are connected to the operational amplifier. Also, signal transfer characteristics of the loop filter satisfy a third-order transfer function or a second-order transfer function by turning on or off the at least one switch.
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公开(公告)号：US20170207796A1
公开(公告)日：2017-07-20
申请号：US15405628
申请日：2017-01-13
Inventor： Young Kyun CHO , Bong Hyuk PARK
CPC classification number: H03M3/454 , H03H11/1204 , H03H11/1291 , H03M3/422 , H03M3/43 , H03M3/452 , H03M3/464
Abstract: A third-order loop filter for a delta signal modulator comprises a single operational amplifier, and a resistor-capacitor network including a plurality of capacitors and a plurality of resistors which are connected to the operational amplifier, and satisfy a third-order transfer function.
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