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1.发明授权Second order loop filter and multi-order delta sigma modulator including the same 有权二阶环路滤波器和包括其的多阶三角Σ调制器公开(公告)号：US09356618B2
公开(公告)日：2016-05-31
申请号：US14617705
申请日：2015-02-09
Inventor： Young Kyun Cho , Jae Ho Jung , Kwangchun Lee
CPC classification number: H03M3/43 , H03H11/1247 , H03H11/126 , H03H11/1291 , H03H11/32 , H03M3/38 , H03M3/422 , H03M3/454 , H03M3/458
Abstract: Provided is a second order loop filter (LF). The second order LF includes: an operational amplifier including a first input, a second input receiving a differential input of the first input, and an output; an inverter inverting a signal output from the output of the operational amplifier to output an inverted signal; a first resistor connected to between the first input and a first node; a second resistor connected to between the output of the operational amplifier and the first node; a third resistor connected to between the first input and an input signal; a first capacitor connected to between the second input and the first node; a second capacitor connected to between the output of the operational amplifier and an output of the inverter; and a third capacitor connected to between the output and the first input of the operational amplifier, wherein the second input is connected to a ground voltage.
Abstract translation: 提供了二阶环路滤波器（LF）。 第二级LF包括：运算放大器，包括第一输入端，接收第一输入端的差分输入端的第二输入端和输出端; 逆变器，反相从运算放大器的输出端输出的信号，输出反相信号; 连接到第一输入和第一节点之间的第一电阻器; 连接到运算放大器的输出端和第一节点之间的第二电阻器; 连接到所述第一输入端和输入信号之间的第三电阻器; 连接到所述第二输入端和所述第一节点之间的第一电容器; 连接在运算放大器的输出端和反相器的输出端之间的第二电容器; 以及连接到所述运算放大器的输出和第一输入之间的第三电容器，其中所述第二输入端连接到接地电压。
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公开(公告)号：US08841951B2
公开(公告)日：2014-09-23
申请号：US14067487
申请日：2013-10-30
Inventor： Hui Dong Lee , Jae Ho Jung , Kwang Chun Lee
IPC: H03K3/017
CPC classification number: H03K3/017 , H03K5/1565
Abstract: Disclosed is an apparatus for controlling a duty ratio of a signal that includes a clock control unit configured to generate a plurality of control signals based on an input signal, a half-cycle generation unit configured to generate a multiplied signal by use of the input signal and a delay signal that is obtained by delaying the input signal based on a delay control voltage, and divide the multiplied signal to generate a first division signal and a second division signal that are in inverse relation to each other, a comparator unit configured to compare a pulse width of the first division signal with a pulse width of the second division signal based on the control signal provided by the clock control unit, and output a delay control signal corresponding to a result of the comparison, and a control voltage generation unit configured to output a delay control voltage.
Abstract translation: 公开了一种用于控制信号的占空比的装置，其包括被配置为基于输入信号生成多个控制信号的时钟控制单元，半周生成单元，被配置为通过使用输入信号生成相乘的信号 以及延迟信号，其通过基于延迟控制电压延迟所述输入信号而获得，并且将所述相乘的信号除以产生彼此成反比的第一除法信号和第二除法信号，所述比较器单元被配置为比较 基于由时钟控制单元提供的控制信号的具有第二分频信号的脉冲宽度的第一分频信号的脉冲宽度，并输出与比较结果相对应的延迟控制信号，以及控制电压生成单元配置 输出延迟控制电压。
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3.发明授权Apparatus and method for calibrating offset voltage and continuous time delta-sigma modulation apparatus including the same 有权用于校正偏移电压的装置和方法以及包括其的连续时间Δ-Σ调制装置公开(公告)号：US08791846B2
公开(公告)日：2014-07-29
申请号：US13707135
申请日：2012-12-06
Inventor： Young Kyun Cho , Jae Ho Jung , Kwangchu Lee
IPC: H03M3/00
Abstract: When an enable signal representing an offset calibration mode is received, a continuous time delta-sigma modulation apparatus generates a first signal using first and second pulse signals representing outputs of the continuous time delta-sigma modulation apparatus and an operation frequency of the continuous time delta-sigma modulation apparatus, generates first and second output bits by performing a counting operation according to a counting method that is determined according to a pulse signal of first and second comparators, applies a voltage corresponding to the first output bit to a body of a first transistor of a primary integrator, and applies a voltage corresponding to the second output bit to a body of a second transistor of the primary integrator.
Abstract translation: 当接收到表示偏移校准模式的使能信号时，连续时间Δ-Σ调制装置使用表示连续时间Δ-Σ调制装置的输出的第一和第二脉冲信号和连续时间delta的操作频率来产生第一信号 Σ调制装置通过根据根据第一和第二比较器的脉冲信号确定的计数方法执行计数操作来产生第一和第二输出比特，将与第一输出比特相对应的电压施加到第一 晶体管，并且将与第二输出位相对应的电压施加到主积分器的第二晶体管的主体。
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公开(公告)号：US10924257B2
公开(公告)日：2021-02-16
申请号：US16393616
申请日：2019-04-24
Inventor： Jae Ho Jung , Kwang Seon Kim
IPC: H04L5/14 , H04B1/00 , H04B1/7107
Abstract: Disclosed are a method and apparatus for canceling self-interference signals in a communication system. A first communication node includes a signal transmission unit configured to generate a first RF signal, an antenna module configured to transmit the first RF signal generated by the signal transmission unit and receive a second RF signal from a second communication node, a signal reception unit configured to process the second RF signal and a self-interference signal caused by the first RF signal, and an SIC circuit configured to cancel the self-interference signal. The SIC circuit includes a DSIC circuit for canceling the self-interference signal in a digital domain and an ASIC circuit and an HSIC circuit for canceling the self-interference signal in an analog domain. Accordingly, the performance of the communication system may be enhanced.
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5.发明授权公开(公告)号：US09106128B2
公开(公告)日：2015-08-11
申请号：US14311417
申请日：2014-06-23
Inventor： Hui Dong Lee , Jae Ho Jung , Kwangchun Lee
CPC classification number: H02M3/07 , H03L7/0895 , H03L7/0896 , H03L7/0898
Abstract: Provided is a charge pump circuit having a current mirror structure, including a first voltage controller including a plurality of first resistors and a plurality of first switches, and in response to a switching control signal corresponding to a bias current, driving the plurality of first switches to allow a current path passing through the plurality of first resistors to bypass, thereby controlling a voltage level of an output end, a second voltage controller including a plurality of second resistors and a plurality of second switches, and in response to the switching control signal, driving the plurality of second switches to allow a current path passing through the plurality of second resistors to bypass, thereby controlling a voltage level of an output end to correspond to the voltage of the output end of the first voltage controller.
Abstract translation: 提供了具有电流镜结构的电荷泵电路，包括包括多个第一电阻器和多个第一开关的第一电压控制器，并且响应于与偏置电流相对应的开关控制信号，驱动多个第一开关 允许通过多个第一电阻器的电流路径旁路，从而控制输出端的电压电平，包括多个第二电阻器和多个第二开关的第二电压控制器，并且响应于开关控制信号 驱动所述多个第二开关以允许通过所述多个第二电阻器的电流路径旁路，由此控制输出端的电压电平对应于所述第一电压控制器的输出端的电压。
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Patent Agency Ranking
6.发明申请APPARATUS AND METHOD FOR CALIBRATING TIME CONSTANT, AND LOW PASS DELTA SIGMA MODULATION APPARATUS INCLUDING THE SAME 失效用于校准时间常数的装置和方法，以及包括其中的低通道三角形调制装置公开(公告)号：US20140002285A1
公开(公告)日：2014-01-02
申请号：US13715056
申请日：2012-12-14
Inventor： Young Kyun CHO , Bong Hyuk Park , Jae Ho Jung
IPC: H03M3/00
Abstract: A time constant calibration apparatus of a low pass delta sigma modulation apparatus calibrates a time constant of an integrator using a resistor and a capacitor, and the time constant calibration apparatus generates a reference voltage by flowing a reference current to a reference resistor, converts the reference voltage to a digital signal, and varies a value of a resistor of an integrator and a value of a capacitor from the digital signal.
Abstract translation: 低通量ΔΣ调制装置的时间常数校准装置使用电阻器和电容器校准积分器的时间常数，并且时间常数校准装置通过将参考电流流向参考电阻器来产生参考电压，转换参考电压 电压到数字信号，并且从数字信号改变积分器的电阻器的值和电容器的值。
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公开(公告)号：US10461725B2
公开(公告)日：2019-10-29
申请号：US15622513
申请日：2017-06-14
Inventor： Young Kyun Cho , Cheol Ho Kim , Bong Hyuk Park , Kwangchun Lee , Jae Ho Jung , Seok Bong Hyun
Abstract: A voltage comparator comparing a voltage of a first input signal and a voltage of a second input signal is provided. The voltage comparator includes: a first switch pair transmitting, respectively, the first input signal and the second input signal to a control terminal of a first transistor and a control terminal of a second transistor in response to a clock signal; a second switch pair connecting a first terminal and a second terminal of the first transistor and connecting a first terminal and a second terminal of the second transistor in response to at least one of the clock signal and a reset signal; and a first reset switch connecting the control terminal of the first transistor and the control terminal of the second transistor in response to the reset signal.
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公开(公告)号：US09014281B2
公开(公告)日：2015-04-21
申请号：US14011268
申请日：2013-08-27
Inventor： Young Kyun Cho , Sung Jun Lee , Seung Hyun Jang , Bong Hyuk Park , Jae Ho Jung , Kwang Chun Lee
CPC classification number: H04L25/4902 , H03K7/08 , H03M3/504 , H04B14/062
Abstract: A delta-sigma modulator and a transmitter apparatus including the same are disclosed. The delta-sigma modulator includes a first integrator, a second integrator, a first comparator configured to compare an output signal of the second integrator and a reference signal, and output a first comparison signal, a second comparator configured to compare the output signal of the second integrator and the reference signal, and output a second comparison signal, a first DAC configured to output the first signal corresponding to the first comparison signal and the second comparison signal, a second DAC configured to output the second signal corresponding to the first comparison signal and the second comparison signal, a delayer configured to generate a delayed signal that delays the first comparison signal and the second comparison signal by a predetermined time, and an output DAC configured to generate an output signal having a multi-level corresponding to the delayed signal.
Abstract translation: 公开了一种Δ-Σ调制器及其发射机装置。 Δ-Σ调制器包括第一积分器，第二积分器，被配置为比较第二积分器的输出信号和参考信号的第一比较器，并输出第一比较信号;第二比较器，被配置为比较第二积分器的输出信号 第二积分器和参考信号，并输出第二比较信号，第一DAC被配置为输出对应于第一比较信号和第二比较信号的第一信号;第二DAC，被配置为输出对应于第一比较信号的第二信号 和第二比较信号，延迟器，被配置为产生将第一比较信号和第二比较信号延迟预定时间的延迟信号;以及输出DAC，被配置为产生具有与延迟信号相对应的多电平的输出信号 。
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公开(公告)号：US09274151B2
公开(公告)日：2016-03-01
申请号：US13687200
申请日：2012-11-28
Inventor： Hui Dong Lee , Jae Ho Jung
IPC: G01R23/00
CPC classification number: G01R23/00 , G01R23/005
Abstract: A frequency comparator outputs an input reference signal and a comparison target signal as pulse-form signals, and is charged or discharged with a voltage corresponding to the reference signal to output a reference voltage having a variable first frequency range, and charged or discharged with a voltage corresponding to the comparison target signal to output a comparison target voltage having a variable second frequency range. The frequency comparator compares the reference voltage having the first frequency range and the comparison output voltage having the second frequency range.
Abstract translation: 频率比较器输出输入参考信号和比较目标信号作为脉冲形式的信号，并用对应于参考信号的电压进行充电或放电，以输出具有可变的第一频率范围的参考电压，并用 电压，以输出具有可变的第二频率范围的比较目标电压。 频率比较器比较具有第一频率范围的参考电压和具有第二频率范围的比较输出电压。
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公开(公告)号：US08791685B2
公开(公告)日：2014-07-29
申请号：US14098989
申请日：2013-12-06
Inventor： Young Kyun Cho , Jae Ho Jung , Kwang Chun Lee
Abstract: Disclosed is a bandgap reference voltage generator insensitive to changes of process, voltage, and temperature. A bandgap reference voltage generator may detect current having characteristic of CTAT and current having characteristic of PTAT which flow in a current compensation part included in an amplification part, and provide body voltage to one of two input transistors included in the amplification part in response to ratio of the two currents when the ratio is different from the preconfigured reference value. Thus, characteristics according to changes of parameters of elements and change of offset of the amplification part due to changes of PVT may be enhanced, and a characteristic of power supply rejection ratio (PSRR) may be enhanced.
Abstract translation: 公开了对工艺，电压和温度的变化不敏感的带隙参考电压发生器。 带隙参考电压发生器可以检测具有CTAT特性的电流和具有在包括在放大部分中的电流补偿部分中流动的PTAT特性的电流，并且响应于比率而向包括在放大部分中的两个输入晶体管之一提供体电压 当该比率与预配置的参考值不同时，两个电流。 因此，可以增加由元件参数的变化引起的特性和由于PVT变化引起的放大部分偏移的变化，并且可以提高电源抑制比（PSRR）的特性。
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