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    System and method for founding establishment through internet
    1.
    发明授权
    System and method for founding establishment through internet 失效
    通过互联网建立企业的制度和方法

    公开(公告)号：US07412394B2

    公开(公告)日：2008-08-12

    申请号：US09769091

    申请日：2001-01-24

    Applicant: John Hsuan ,  Ellis Lee

    Inventor： John Hsuan ,  Ellis Lee

    IPC: G06Q10/00

    CPC classification number: G06Q30/06 ,  G06Q30/018 ,  G06Q30/0601

    Abstract: A system for speeding up an establishment's foundation through Internet comprises a data storage device having databases built therein and an electronic hub connected to the data storage device through computer program. The electronic hub is cooperated with the data storage device, whereby is capable to communicate, examine the resource provider, save the resource provider, and match the resource provider and whereby speeds up the establishment's foundation. A method for speeding up founding establishment through Internet comprises communicating, examining the resource provider, saving the resource provider, and matching the resource provider.

    Abstract translation: 通过互联网加速企业基础的系统包括具有内置数据库的数据存储装置和通过计算机程序连接到数据存储装置的电子集线器。 电子集线器与数据存储装置配合，从而能够进行通信，检查资源提供者，保存资源提供者，并与资源提供者匹配，从而加快了企业的基础。 通过互联网加速建立企业的方法包括通信，审查资源提供者，节约资源提供者，以及资源提供者的匹配。

    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same
    2.
    发明授权
    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same 有权
    互连结构具有设置在导电结构之间或围绕导电结构内的导电结构的扩大气隙

    公开(公告)号：US06940146B2

    公开(公告)日：2005-09-06

    申请号：US10670145

    申请日：2003-09-23

    Applicant: Ellis Lee ,  Tsing-Fong Hwang

    Inventor： Ellis Lee ,  Tsing-Fong Hwang

    IPC: H01L21/768 ,  H01L29/00 ,  H01L21/76

    CPC classification number: H01L21/76802 ,  H01L21/7682 ,  H01L21/76834

    Abstract: An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer. As a result, the first structured dielectric layer has a substantially planar surface. A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.

    Abstract translation: 在基板上形成互连。 导电结构至少包括在其间具有间隙区域的第一导电结构和第二导电结构。 衬底在间隙区域暴露。 第一结构化介电层形成在衬底上以覆盖第一和第二导电结构。 第一结构化介电层在第一和第二导电结构之间的间隙区域也具有空隙。 空隙显着延伸到整个间隙区域。 第一结构化介电层还在空隙上方具有凹陷区域。 抗蚀刻层填充第一结构化介电层的凹陷区域。 结果，第一结构化介电层具有基本平坦的表面。 在第一结构化介电层和抗蚀刻层上形成第二结构化介电层。 第一结构化介电层和第二结构化介电层也具有露出导电结构的开口。 当开口由于未对准而移动到第一导电结构和第二导电结构之间的间隙区域时，间隙区域上方的开口部分停止在抗蚀刻层上而不打开空隙。

    Interconnect structure and method for manufacturing the same
    4.
    发明申请
    Interconnect structure and method for manufacturing the same 审中-公开
    互连结构及其制造方法

    公开(公告)号：US20050131775A1

    公开(公告)日：2005-06-16

    申请号：US11049444

    申请日：2005-02-01

    Applicant: John Hsuan ,  Ellis Lee

    Inventor： John Hsuan ,  Ellis Lee

    IPC: G06Q30/00 ,  G06Q30/06 ,  G06F17/60

    CPC classification number: G06Q30/06 ,  G06Q30/018 ,  G06Q30/0601

    Abstract: A system for speeding up an establishment's foundation through Internet comprises a data storage device having databases built therein and an electronic hub connected to the data storage device through computer program. The electronic hub is cooperated with the data storage device, whereby is capable to communicate, examine the resource provider, save the resource provider, and match the resource provider and whereby speeds up the establishment's foundation. A method for speeding up founding establishment through Internet comprises communicating, examining the resource provider, saving the resource provider, and matching the resource provider.

    Abstract translation: 通过互联网加速企业基础的系统包括具有内置数据库的数据存储装置和通过计算机程序连接到数据存储装置的电子集线器。 电子集线器与数据存储装置配合，从而能够进行通信，检查资源提供者，保存资源提供者，并与资源提供者匹配，从而加快了企业的基础。 通过互联网加速建立企业的方法包括通信，审查资源提供者，节约资源提供者，以及资源提供者的匹配。

    Dual damascene structure and its manufacturing method
    5.
    发明授权
    Dual damascene structure and its manufacturing method 失效
    双镶嵌结构及其制造方法

    公开(公告)号：US5933761A

    公开(公告)日：1999-08-03

    申请号：US113879

    申请日：1998-07-10

    Applicant: Ellis Lee

    Inventor： Ellis Lee

    IPC: H01L21/265 ,  H01L21/311 ,  H01L21/768 ,  H01L23/522 ,  H01L21/477

    CPC classification number: H01L21/76829 ,  H01L21/26533 ,  H01L21/31144 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76825 ,  H01L21/76828 ,  H01L23/5226 ,  H01L2924/0002 ,  Y10S438/95

    Abstract: The present invention relates to a dual damascene structure and its manufacturing method. The invention uses two implanting step to form two stop layers. It uses the stop layers to perform an anisotropic etching step so as to form a via and trench. Finally, a conductive layer is filled into the via and trench followed by the completion of forming of the dual damascene structure. The invention controls the etching stop. Another advantage of the present invention is that of using the spacer as the trench mask instead of the multi-mask. Therefore, misalignment is prevented in the present invention.

    Abstract translation: 本发明涉及一种双镶嵌结构及其制造方法。 本发明使用两个植入步骤形成两个停止层。 它使用停止层进行各向异性蚀刻步骤以形成通孔和沟槽。 最后，将导电层填充到通孔和沟槽中，随后完成双镶嵌结构的形成。 本发明控制蚀刻停止。 本发明的另一个优点是使用间隔物作为沟槽掩模而不是多掩模。 因此，在本发明中防止了未对准。

    Reducing relative stress between HDP layer and passivation layer
    6.
    发明授权
    Reducing relative stress between HDP layer and passivation layer 有权

    公开(公告)号：US06657283B2

    公开(公告)日：2003-12-02

    申请号：US10170234

    申请日：2002-06-13

    Applicant: Ellis Lee ,  Ing-Tang Chen ,  Horng-Bor Lu

    Inventor： Ellis Lee ,  Ing-Tang Chen ,  Horng-Bor Lu

    IPC: H01L2358

    CPC classification number: H01L23/3192 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Structures for reducing relative stress between HDP layer and passivation layer are proposed by the invention, where the HDP layer is formed by high density plasma and the passivation layer is a conventional passivation layer. The invention provides some structures that can be divided into two categories: one, a low stress passivation layer is directly formed on a HDP layer; another, a low stress layer is formed between passivation layer and HDP layer to reduce relative layer that between any two adjacent layers. Therefore, it is crystal-clear that possible structures of the invention comprise following varieties: First, a low stress passivation layer is located between a passivation layer and a HDP layer. Second, a lower stress passivation layer directly locates on a HDP layer. Third, a low stress layer is formed between a passivation layer and a HDP layer.

    Interconnect structure with air gap compatible with unlanded vias
    7.
    发明授权
    Interconnect structure with air gap compatible with unlanded vias 有权
    互连结构与空隙兼容，与非接地通孔

    公开(公告)号：US06492732B2

    公开(公告)日：2002-12-10

    申请号：US09849666

    申请日：2001-05-04

    Applicant: Ellis Lee ,  Shih-Wei Sun

    Inventor： Ellis Lee ,  Shih-Wei Sun

    IPC: H01L23522

    CPC classification number: H01L21/7682 ,  H01L21/76802

    Abstract: An interconnect structure has a substrate having devices already formed thereon. A dielectric layer covers over the substrate. A conductive structure having at least two substructure separated by an air gap is formed on the dielectric layer. A capping layer covers the conductive structure and the air gap. The capping layer at a portion above the air gap also fills into the air gap by a predetermined distance. The air gap may also extend into the dielectric layer to have a greater height. An etching stop layer is formed on the capping layer. An inter-metal dielectric layer is formed on the etching stop layer. The inter-metal dielectric layer, the etching stop layer and the capping layer are patterned to form an opening that exposes a top surface of the conductive structure. The opening may also expose a top portion of a sidewall of the conductive structure if a misalignment occurs, but the opening does not expose the air gap due to protection from the predetermined distance of the capping layer within the air gap. A next level of conductive structure can be formed to fill the opening. A liner layer can be also formed on a sidewall of the substructure interfacing the air gap, so as to protect the conductive structure.

    Abstract translation: 互连结构具有其上已经形成有器件的衬底。 电介质层覆盖在衬底上。 在电介质层上形成具有至少两个由气隙分隔的子结构的导电结构。 覆盖层覆盖导电结构和气隙。 在气隙上方的一部分上的覆盖层也填充到气隙中预定的距离。 气隙也可以延伸到电介质层中以具有更大的高度。 在覆盖层上形成蚀刻停止层。 在蚀刻停止层上形成金属间介电层。 将金属间介电层，蚀刻停止层和覆盖层图案化以形成露出导电结构的顶表面的开口。 如果发生不对准，则开口也可能暴露出导电结构的侧壁的顶部部分，但是由于防止气隙内的封盖层的预定距离的保护，开口不暴露气隙。 可以形成下一级的导电结构以填充开口。 衬垫层也可以形成在与气隙接合的子结构的侧壁上，以便保护导电结构。

    Method for forming an interconnect structure with air gap compatible with unlanded vias
    8.
    发明授权
    Method for forming an interconnect structure with air gap compatible with unlanded vias 有权
    用于形成具有与未通孔的空隙兼容的互连结构的方法

    公开(公告)号：US06492256B2

    公开(公告)日：2002-12-10

    申请号：US10098718

    申请日：2002-03-15

    Applicant: Ellis Lee ,  Shih-Wei Sun

    Inventor： Ellis Lee ,  Shih-Wei Sun

    IPC: H01L214763

    CPC classification number: H01L21/7682 ,  H01L21/76802

    Abstract: An interconnect structure has a substrate having devices already formed thereon. A dielectric layer covers over the substrate. A conductive structure having at least two substructure separated by an air gap is formed on the dielectric layer. A capping layer covers the conductive structure and the air gap. The capping layer at a portion above the air gap also fills into the air gap by a predetermined distance. The air gap may also extend into the dielectric layer to have a greater height. An etching stop layer is formed on the capping layer. An inter-metal dielectric layer is formed on the etching stop layer. The inter-metal dielectric layer, the etching stop layer and the capping layer are patterned to form an opening that exposes a top surface of the conductive structure. The opening may also expose a top portion of a sidewall of the conductive structure if a misalignment occurs, but the opening does not expose the air gap due to protection from the predetermined distance of the capping layer within the air gap. A next level of conductive structure can be formed to fill the opening. A liner layer can be also formed on a sidewall of the substructure interfacing the air gap, so as to protect the conductive structure.

    Abstract translation: 互连结构具有其上已经形成有器件的衬底。 电介质层覆盖在衬底上。 在电介质层上形成具有至少两个由气隙隔开的子结构的导电结构。 覆盖层覆盖导电结构和气隙。 在气隙上方的一部分上的覆盖层也填充到气隙中预定的距离。 气隙也可以延伸到电介质层中以具有更大的高度。 在覆盖层上形成蚀刻停止层。 在蚀刻停止层上形成金属间介电层。 将金属间介电层，蚀刻停止层和覆盖层图案化以形成露出导电结构的顶表面的开口。 如果发生不对准，则开口也可能暴露出导电结构的侧壁的顶部部分，但是由于防止气隙内的封盖层的预定距离的保护，开口不暴露气隙。 可以形成下一级的导电结构以填充开口。 衬垫层也可以形成在与气隙接合的子结构的侧壁上，以便保护导电结构。

    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same
    10.
    发明授权
    Interconnect structure with an enlarged air gaps disposed between conductive structures or surrounding a conductive structure within the same 有权

    公开(公告)号：US06914318B2

    公开(公告)日：2005-07-05

    申请号：US10670012

    申请日：2003-09-23

    Applicant: Ellis Lee ,  Tsing-Fong Hwang

    Inventor： Ellis Lee ,  Tsing-Fong Hwang

    IPC: H01L21/768 ,  H01L29/00

    CPC classification number: H01L21/76829 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76897

    Abstract: An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer. As a result, the first structured dielectric layer has a substantially planar surface. A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.

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