公开(公告)号：US11749747B2

公开(公告)日：2023-09-05

申请号：US17574661

申请日：2022-01-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson R. Holt ,  Vibhor Jain ,  Jeffrey B. Johnson ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/66 ,  H01L21/763 ,  H01L29/06

CPC classification number: H01L29/7371 ,  H01L21/763 ,  H01L29/0642 ,  H01L29/66242

Abstract: Embodiments of the disclosure provide a bipolar transistor structure with a collector on a polycrystalline isolation layer. A polycrystalline isolation layer may be on a substrate, and a collector layer may be on the polycrystalline isolation layer. The collector layer has a first doping type and includes a polycrystalline semiconductor. A base layer is on the collector layer and has a second doping type opposite the first doping type. An emitter layer is on the base layer and has the first doping type. A material composition of the doped collector region is different from a material composition of the base layer.

公开(公告)号：US11637068B2

公开(公告)日：2023-04-25

申请号：US17121810

申请日：2020-12-15

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Steven M. Shank ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L23/00 ,  H01L23/373 ,  H01L23/48 ,  H01L27/06

Abstract: Processing forms an integrated circuit structure having first and second layers on opposite sides of an insulator, and an interconnect structure extending through the insulator between the first layer and the second layer. The interconnect structure is formed in an opening extending through the insulator between the first layer and the second layer and has an electrical conductor in the opening extending between the first layer and the second layer and a thermally conductive electrical insulator liner along sidewalls of the opening extending between the first layer and the second layer. The electrical conductor is positioned to conduct electrical signals between the first layer and the second layer, and the thermally conductive electrical insulator liner is positioned to transfer heat between the first layer and the second layer.

公开(公告)号：US20220291126A1

公开(公告)日：2022-09-15

申请号：US17195887

申请日：2021-03-09

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Steven M. Shank ,  Anthony K. Stamper ,  John J. Ellis-Monaghan ,  John J. Pekarik ,  Yusheng Bian

IPC: G01N21/64 ,  H01L31/12 ,  H01L31/02 ,  H01L31/0232 ,  G01N21/85

Abstract: A “lab on a chip” includes an optofluidic sensor and components to analyze signals from the optofluidic sensor. The optofluidic sensor includes a substrate, a channel at least partially defined by a portion of a layer of first material on the substrate, input and output fluid reservoirs in fluid communication with the channel, at least a first radiation source coupled to the substrate adapted to generate radiation in a direction toward the channel, and at least one photodiode positioned adjacent and below the channel.

公开(公告)号：US20220189877A1

公开(公告)日：2022-06-16

申请号：US17121810

申请日：2020-12-15

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Vibhor Jain ,  Steven M. Shank ,  John J. Ellis-Monaghan ,  John J. Pekarik

IPC: H01L23/532 ,  H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/00 ,  H01L23/373

Abstract: Processing forms an integrated circuit structure having first and second layers on opposite sides of an insulator, and an interconnect structure extending through the insulator between the first layer and the second layer. The interconnect structure is formed in an opening extending through the insulator between the first layer and the second layer and has an electrical conductor in the opening extending between the first layer and the second layer and a thermally conductive electrical insulator liner along sidewalls of the opening extending between the first layer and the second layer. The electrical conductor is positioned to conduct electrical signals between the first layer and the second layer, and the thermally conductive electrical insulator liner is positioned to transfer heat between the first layer and the second layer.

公开(公告)号：US11094834B2

公开(公告)日：2021-08-17

申请号：US16790084

申请日：2020-02-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Qizhi Liu ,  Vibhor Jain ,  John J. Pekarik ,  Judson R. Holt

IPC: H01L21/00 ,  H01L29/808 ,  H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L21/02 ,  H01L21/225 ,  H01L29/66

Abstract: A junction field effect transistor (JFET) structure includes a doped polysilicon gate over a channel region of a semiconductor layer. The doped polysilicon gate has a first doping type. A raised epitaxial source is on the source region of the semiconductor layer and adjacent a first sidewall of the doped polysilicon gate, and has a second doping type opposite the first doping type. A raised epitaxial drain is on the drain region of the semiconductor layer and adjacent a second sidewall of the doped polysilicon gate, and has the second doping type. A doped semiconductor region is within the channel region of the semiconductor layer and extending from the source region to the drain region, and a non-conductive portion of the semiconductor layer is within the channel region to separate the doped semiconductor region from the doped polysilicon gate.

公开(公告)号：US20210091213A1

公开(公告)日：2021-03-25

申请号：US16748055

申请日：2020-01-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  John J. Pekarik ,  Qizhi Liu ,  Judson Holt

IPC: H01L29/737 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A collector layer includes an inclined side surface, and a dielectric layer is positioned in a lateral direction adjacent to the inclined side surface of the collector layer. An intrinsic base is disposed over the collector layer, and an emitter is disposed over the intrinsic base. An airgap is positioned between the dielectric layer and the inclined side surface of the collector layer in the lateral direction, and an extrinsic base is positioned in the lateral direction adjacent to the intrinsic base. The extrinsic base is positioned over the airgap.

公开(公告)号：US20240172455A1

公开(公告)日：2024-05-23

申请号：US17990800

申请日：2022-11-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： John J. Pekarik ,  Hong Yu ,  Vibhor Jain ,  Alexander Derrickson ,  Venkatesh Gopinath

IPC: H01L47/00 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L27/2445 ,  H01L29/66242 ,  H01L29/7371 ,  H01L45/1233 ,  H01L45/16

Abstract: Structures that include bipolar junction transistors and methods of forming such structures. The structure comprises a substrate having a top surface, a trench isolation region in the substrate, and a base layer on the top surface of the substrate. The base layer extending across the trench isolation region. A first bipolar junction transistor includes a first collector in the substrate and a first emitter on a first portion of the first base layer. The first portion of the first base layer is positioned between the first collector and the first emitter. A second bipolar junction transistor includes a second collector in the substrate and a second emitter on a second portion of the first base layer. The second portion of the first base layer is positioned between the second collector and the second emitter.

公开(公告)号：US20240170561A1

公开(公告)日：2024-05-23

申请号：US17990931

申请日：2022-11-21

Applicant: GlobalFoundries U.S. Inc.

Inventor： Vibhor Jain ,  Jeffrey Johnson ,  Viorel Ontalus ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7378 ,  H01L29/0817 ,  H01L29/66242

Abstract: Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. The structure comprises an emitter, a collector including a first section, a second section, and a third section positioned in a first direction between the first section and the second section, and an intrinsic base disposed in a second direction between the emitter and the third section of the collector. The structure further comprises a stress layer including a section positioned to overlap with the emitter, the intrinsic base, and the collector. The section of the stress layer is surrounded by a perimeter, and the first and second sections of the collector are each positioned adjacent to the perimeter of the stress layer.

公开(公告)号：US20240072180A1

公开(公告)日：2024-02-29

申请号：US17896711

申请日：2022-08-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Saloni Chaurasia ,  Jeffrey Johnson ,  Vibhor Jain ,  Crystal R. Kenney ,  Sudesh Saroop ,  Teng-Yin Lin ,  John J. Pekarik

IPC: H01L29/93 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/93 ,  H01L29/1095 ,  H01L29/66174

Abstract: Structures for a varactor diode and methods of forming same. The structure comprises a first semiconductor layer including a section on a substrate, a second semiconductor layer on the section of the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, and a doped region in the section of the first semiconductor layer. The section of the first semiconductor layer and the doped region have a first conductivity type, and the second semiconductor layer comprises silicon-germanium having a second conductivity type opposite to the first conductivity type, and the third semiconductor layer has the second conductivity type. The doped region contains a higher concentration of a dopant of the first conductivity type than the section of the first semiconductor layer. The second semiconductor layer abuts the first section of the first semiconductor layer along an interface, and the doped region is positioned adjacent to the interface.

公开(公告)号：US11784224B2

公开(公告)日：2023-10-10

申请号：US17455290

申请日：2021-11-17

Applicant: GlobalFoundries U.S. Inc.

Inventor： Hong Yu ,  Jagar Singh ,  Zhenyu Hu ,  John J. Pekarik

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40 ,  H01L29/737 ,  H01L29/66 ,  H01L29/735 ,  H01L29/08

CPC classification number: H01L29/1008 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/401 ,  H01L29/41708 ,  H01L29/42304 ,  H01L29/6625 ,  H01L29/66242 ,  H01L29/735 ,  H01L29/737

Abstract: The disclosure provides a lateral bipolar transistor structure with a base layer over a semiconductor buffer, and related methods. A lateral bipolar transistor structure may include an emitter/collector (E/C) layer over an insulator. The E/C layer has a first doping type. A semiconductor buffer is adjacent the insulator. A base layer is on the semiconductor buffer and adjacent the E/C layer, the base layer including a lower surface below the E/C layer and an upper surface above the E/C layer. The base layer has a second doping type opposite the first doping type.