公开(公告)号：US06917633B2

公开(公告)日：2005-07-12

申请号：US10376455

申请日：2003-03-03

申请人： Ho-Young Kim ,  Eun-Soo Nam ,  Kyoung-Ik Cho

发明人： Ho-Young Kim ,  Eun-Soo Nam ,  Kyoung-Ik Cho

IPC分类号： H01S3/05 ,  H01S3/067 ,  H01S3/08 ,  H01S3/082 ,  H01S3/1055 ,  H01S3/16 ,  H01S3/10 ,  H01S3/083

CPC分类号： H01S3/06791 ,  H01S3/06725 ,  H01S3/0675 ,  H01S3/08022 ,  H01S3/082 ,  H01S3/1055 ,  H01S3/1608

摘要： There is provided a millimeter wave band frequency optical oscillator predicted to be used as a millimeter wave oscillating frequency signal source in a base station of a millimeter wave wireless transmission system. The optical oscillator has a double resonator structure in which a pair of wavelength tunable fiber grating mirrors are inserted into a unilateral fiber-ring laser resonator in order to internally and additionally form a linear laser resonator. The double resonator structure composed of the two stable laser resonators can oscillate laser of two modes. Due to a beat phenomenon occurring between the two modes, received laser is modulated to an ultra-speed frequency of 60 GHz or greater. A variation in the gain within a resonator is induced by a polarization controller using the dependency of laser modes upon polarization. A modulation frequency is consecutively changed from 60 GHz to 80 GHz by controlling the wavelength of light reflected by the fiber grating mirrors.

摘要翻译： 提供了在毫米波无线传输系统的基站中预测用作毫米波振荡频率信号源的毫米波段频率光学振荡器。 光学振荡器具有双谐振器结构，其中一对波长可调光纤光栅镜被插入到单边光纤环激光谐振器中，以便在内部并另外形成线性激光谐振器。 由两个稳定的激光谐振器组成的双谐振器结构可以振荡两种模式的激光。 由于在两种模式之间发生拍子现象，所接收的激光器被调制到60GHz或更大的超速频率。 谐振器内增益的变化由偏振控制器引起，该偏振控制器使用激光模式对极化的依赖性。 通过控制由光纤光栅镜反射的光的波长，调制频率从60GHz连续地变化到80GHz。

公开(公告)号：US11726406B2

公开(公告)日：2023-08-15

申请号：US17718648

申请日：2022-04-12

申请人： Sunghwan Kim ,  Ho-Young Kim ,  Seok Heo ,  Dongwook Kim ,  Sungjin Kim ,  Chaehung Lim ,  Jaekyung Park ,  Jae Hong Lee ,  Junyoung Lee

发明人： Sunghwan Kim ,  Ho-Young Kim ,  Seok Heo ,  Dongwook Kim ,  Sungjin Kim ,  Chaehung Lim ,  Jaekyung Park ,  Jae Hong Lee ,  Junyoung Lee

IPC分类号： G03F7/16 ,  G03F7/20

CPC分类号： G03F7/162 ,  G03F7/168 ,  G03F7/2028

摘要： In a method of coating a photoresist, the photoresist may be provided to an upper surface of a rotating wafer. A hovering solution may be injected to an edge portion of the photoresist under a condition that the hovering solution may be hovered with respect to the edge portion of the photoresist with an air layer being interposed between the hovering solution and the edge portion of the photoresist to limit and/or prevent a bead of the photoresist from being formed on an edge portion of the upper surface of the wafer. Thus, the photoresist having a uniform thickness may be coated on the upper surface of the wafer to improve a yield of a semiconductor device by increasing an effective area of the edge portion of the wafer.

公开(公告)号：US08652910B2

公开(公告)日：2014-02-18

申请号：US13438250

申请日：2012-04-03

申请人： Bo-Kyeong Kang ,  Jae-Seok Kim ,  Ho-Young Kim ,  Bo-Un Yoon ,  Il-Young Yoon

发明人： Bo-Kyeong Kang ,  Jae-Seok Kim ,  Ho-Young Kim ,  Bo-Un Yoon ,  Il-Young Yoon

IPC分类号： H01L21/336

CPC分类号： H01L21/823431 ,  H01L21/845

摘要： In a method for fabricating a semiconductor device, a substrate may be provided that includes: a base, an active fin that projects from an upper surface of the base and is integrally formed with the base, and a buffer oxide film pattern formed on the active fin in contact with the active fin. A first dummy gate film may be formed on the substrate to cover the buffer oxide film pattern and the first dummy gate film may be smoothed to expose the buffer oxide film pattern. A second dummy gate film may be formed on the exposed buffer oxide film pattern and the first dummy gate film.

摘要翻译： 在制造半导体器件的方法中，可以提供一种基板，其包括：底座，从基座的上表面突出并与基座一体形成的活动翅片，以及形成在活动件上的缓冲氧化膜图案 翅片与活动翅片接触。 可以在衬底上形成第一伪栅极膜以覆盖缓冲氧化膜图案，并且可以平滑第一伪栅极膜以暴露缓冲氧化膜图案。 可以在暴露的缓冲氧化膜图案和第一伪栅极膜上形成第二伪栅极膜。

公开(公告)号：US20110297182A1

公开(公告)日：2011-12-08

申请号：US12907642

申请日：2010-10-19

申请人： Jae-Hyuck Choi ,  Won-Jung Kim ,  Ho-Young Kim ,  Hyung-Ho Ko ,  Jong-Keun Oh ,  Chan-Uk Jeon ,  Keun-Hwan Park

发明人： Jae-Hyuck Choi ,  Won-Jung Kim ,  Ho-Young Kim ,  Hyung-Ho Ko ,  Jong-Keun Oh ,  Chan-Uk Jeon ,  Keun-Hwan Park

IPC分类号： B08B3/12

CPC分类号： B08B3/12 ,  G03F1/82 ,  H01L21/02057 ,  H01L21/67057

摘要： A megasonic cleaning method and a megasonic cleaning apparatus are provided. Microcavitation bubbles may be formed by applying an electromotive force to a cleaning solution using a megasonic energy in a separate room from an object to be cleaned. The microcavitation bubbles having a stable oscillation among the formed microcavitation bubbles may be moved to the object to be cleaned. A surface of the object to be cleaned may be cleaned using the microcavitation bubbles having the stable oscillation. Particles attached onto the surface of the object to be cleaned may be effectively removed while preventing pattern damage.

摘要翻译： 提供了一种兆声波清洗方法和一种超声波清洗装置。 微气泡可以通过使用超声波能量在与要清洁的物体分离的房间中的清洁溶液施加电动势来形成。 在形成的微气泡之间具有稳定振荡的微气泡可以移动到要清洁的物体。 可以使用具有稳定振荡的微气泡来清洁待清洁物体的表面。 可以有效地除去附着在待清洁物体表面上的颗粒，同时防止图案损坏。

公开(公告)号：US20100157709A1

公开(公告)日：2010-06-24

申请号：US12589674

申请日：2009-10-27

申请人： Ho-Young Kim ,  Jung-Bae Lee

发明人： Ho-Young Kim ,  Jung-Bae Lee

IPC分类号： G11C7/04 ,  G11C8/00 ,  G11C7/00

CPC分类号： G11C29/02 ,  G11C5/143 ,  G11C7/04 ,  G11C11/406 ,  G11C11/40626 ,  G11C29/028 ,  G11C2029/5002 ,  G11C2207/2254

摘要： A semiconductor memory device includes a plurality of memory banks; a plurality of temperature sensing circuits, and a shared control circuit. The temperature sensing circuits correspond to the memory banks and each is disposed in the vicinity of a corresponding memory bank. The shared control circuit is connected to the plurality of temperature sensing circuits and a plurality of refresh circuits for refreshing the plurality of memory banks, performs calibration on the plurality of temperature sensing circuits, performs digital processing on signals for separately controlling refresh intervals for the plurality of memory banks, and transmits the processed signals to the plurality of refresh circuits. Therefore, the refresh intervals for individual channels or banks are separately or selectively controlled. Further, since the plurality of temperature sensing circuits are connected to the shared temperature control circuit, the occupied area of the circuits in a chip is reduced or minimized.

摘要翻译： 半导体存储器件包括多个存储体; 多个温度检测电路和共享控制电路。 温度感测电路对应于存储体，并且各自设置在相应的存储体的附近。 共享控制电路连接到多个温度检测电路和多个刷新电路，用于刷新多个存储体，对多个温度感测电路进行校准，对用于分别控制多个温度感测电路的刷新间隔的信号执行数字处理 的存储体，并且将处理的信号发送到多个刷新电路。 因此，单独或选择性地控制各通道或组的刷新间隔。 此外，由于多个温度检测电路连接到共享温度控制电路，芯片中的电路的占用面积减小或最小化。

公开(公告)号：US06984357B2

公开(公告)日：2006-01-10

申请号：US10297741

申请日：2002-04-10

申请人： Ho-Young Kim ,  Jong-Keun Kim ,  Goo-Hwa Kim ,  Hee-Tae Jeong ,  Min-Su Yoon ,  Anastasia Kolesnichenko

发明人： Ho-Young Kim ,  Jong-Keun Kim ,  Goo-Hwa Kim ,  Hee-Tae Jeong ,  Min-Su Yoon ,  Anastasia Kolesnichenko

IPC分类号： C21C5/42

CPC分类号： C23C2/24

摘要： A molten metal holding apparatus for the continuous hot dip coating of a metal strip includes a vessel that is substantially rectangular in cross section having long sides and short sides and has formed a slot-shaped opening in a bottom surface, the vessel containing molten metal; subsidiary vessels formed following an outer circumference of an upper end of the vessal and for temporarily storing molten metal that overflows from the upper end of the vessel; chambers formed outwardly following long sides of a lower end of the vessel and that communicate with the vessel via slit-shaped branch openings formed at a predetermined slant toward the vessel; a plurality of subsidiary tubes communicating with the subsidiary vessels; and alternating current electromagnets including a core mounted adjacent to outside side surfaces of the vessel and between the subsidiary vessels and the chambers and a coil wound around the core and to which an alternating current is supplied.

摘要翻译： 用于金属条的连续热浸涂层的熔融金属保持装置包括：具有长边和短边的截面基本上为矩形的容器，并且在底面形成有槽形开口，容器包含熔融金属; 辅助容器形成在容器的上端的外圆周上，并用于临时储存从容器的上端溢出的熔融金属; 在容器的下端的长边之后形成的腔室，并且通过形成在朝向容器的预定斜面的狭缝状分支开口与容器连通; 与辅助船舶通信的多个辅助管道; 以及包括安装在容器的外侧表面和辅助容器与腔室之间的芯的交流电磁铁，以及缠绕在芯上的线圈，并且供给交流电。

公开(公告)号：US09190407B2

公开(公告)日：2015-11-17

申请号：US14569597

申请日：2014-12-12

申请人： Byoung-Ho Kwon ,  Cheol Kim ,  Ho-Young Kim ,  Se-Jung Park ,  Myeong-Cheol Kim ,  Bo-Kyeong Kang ,  Bo-Un Yoon ,  Jae-Kwang Choi ,  Si-Young Choi ,  Suk-Hoon Jeong ,  Geum-Jung Seong ,  Hee-Don Jeong ,  Yong-Joon Choi ,  Ji-Eun Han

发明人： Byoung-Ho Kwon ,  Cheol Kim ,  Ho-Young Kim ,  Se-Jung Park ,  Myeong-Cheol Kim ,  Bo-Kyeong Kang ,  Bo-Un Yoon ,  Jae-Kwang Choi ,  Si-Young Choi ,  Suk-Hoon Jeong ,  Geum-Jung Seong ,  Hee-Don Jeong ,  Yong-Joon Choi ,  Ji-Eun Han

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/49

CPC分类号： H01L29/7853 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/42364 ,  H01L29/4238 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/78 ,  H01L29/785

摘要： Semiconductor devices may include a semiconductor substrate with a first semiconductor fin aligned end-to-end with a second semiconductor with a recess between facing ends of the first and second semiconductor fins. A first insulator pattern is formed adjacent sidewalls of the first and second semiconductor fins and a second insulator pattern is formed within the first recess. The second insulator pattern may have a top surface higher than a top surface of the first insulator pattern, such as to the height of the top surface of the fins (or higher or lower). First and second gates extend along sidewalls and a top surface of the first semiconductor fin. A dummy gate electrode may be formed on the top surface of the second insulator. Methods for manufacture of the same and modifications are also disclosed.

摘要翻译： 半导体器件可以包括具有第一半导体鳍片的半导体衬底，第一半导体鳍片端对端与第二半导体对准，第二半导体在第一和第二半导体鳍片的相对端之间具有凹陷。 第一绝缘体图案形成在第一和第二半导体鳍片的相邻侧壁附近，并且在第一凹部内形成第二绝缘体图案。 第二绝缘体图案可以具有高于第一绝缘体图案的顶表面的顶表面，例如高于鳍片（或更高或更低）的顶表面的高度。 第一和第二栅极沿第一半导体鳍片的侧壁和顶表面延伸。 可以在第二绝缘体的顶表面上形成伪栅电极。 还公开了其制造方法和修改方案。

公开(公告)号：US09093027B2

公开(公告)日：2015-07-28

申请号：US13751263

申请日：2013-01-28

申请人： Guang hai Jin ,  Dong-Gyu Kim ,  Kwan-Wook Jung ,  Ho-Young Kim ,  June-Woo Lee ,  In-Ho Choi

发明人： Guang hai Jin ,  Dong-Gyu Kim ,  Kwan-Wook Jung ,  Ho-Young Kim ,  June-Woo Lee ,  In-Ho Choi

IPC分类号： G09G3/32

CPC分类号： G09G3/3233 ,  G09G3/3291 ,  G09G2300/0852 ,  G09G2300/0861

摘要： A display device includes a plurality of pixels, each pixel including an organic light emitting diode (OLED) and a driving transistor, a sustain power supply unit applying a first sustain voltage to a plurality of data lines connected to the plurality of pixels, and a data driver applying one of a data signal and a second sustain voltage to the plurality of data lines. For each pixel, the sustain power supply unit applies the first sustain voltage as a first level voltage to reset a gate voltage of the driving transistor and applies the first sustain voltage as a second level voltage to increase the gate voltage of the driving transistor. When an anode voltage of the OLED in each pixel is discharged to be reset, the anode voltage of the OLED is controlled according to a voltage difference between the first level voltage and the second level voltage.

摘要翻译： 显示装置包括多个像素，每个像素包括有机发光二极管（OLED）和驱动晶体管，维持电源单元对连接到多个像素的多个数据线施加第一维持电压，以及 数据驱动器将数据信号和第二维持电压中的一个施加到多条数据线。 对于每个像素，维持电源单元施加第一维持电压作为第一电平电压以复位驱动晶体管的栅极电压，并施加第一维持电压作为第二电平电压以增加驱动晶体管的栅极电压。 当每个像素中的OLED的阳极电压被放电以被复位时，OLED的阳极电压根据第一电平电压和第二电平电压之间的电压差来控制。

公开(公告)号：US20120221797A1

公开(公告)日：2012-08-30

申请号：US13362460

申请日：2012-01-31

申请人： Moo-Kyoung Chung ,  Soo-Jung Ryu ,  Ho-Young Kim ,  Woong Seo ,  Young-Chul Cho

发明人： Moo-Kyoung Chung ,  Soo-Jung Ryu ,  Ho-Young Kim ,  Woong Seo ,  Young-Chul Cho

IPC分类号： G06F12/08

CPC分类号： G06F12/0853 ,  G06F12/0846

摘要： Provided is a multi-port cache memory apparatus and a method of the multi-port cache memory apparatus. The multi-port memory apparatus may divide an address space into address regions and allocate the divided memory regions to cache banks, thereby preventing the concentration of access to a particular cache.

摘要翻译： 提供了一种多端口高速缓存存储装置和多端口高速缓存存储装置的方法。 多端口存储装置可以将地址空间划分为地址区域，并将划分的存储区域分配给高速缓存存储体，从而防止对特定高速缓存的访问集中。

公开(公告)号：US08174921B2

公开(公告)日：2012-05-08

申请号：US12589674

申请日：2009-10-27

申请人： Ho-Young Kim ,  Jung-Bae Lee

发明人： Ho-Young Kim ,  Jung-Bae Lee

IPC分类号： G11C7/00

CPC分类号： G11C29/02 ,  G11C5/143 ,  G11C7/04 ,  G11C11/406 ,  G11C11/40626 ,  G11C29/028 ,  G11C2029/5002 ,  G11C2207/2254

摘要： A semiconductor memory device includes a plurality of memory banks; a plurality of temperature sensing circuits, and a shared control circuit. The temperature sensing circuits correspond to the memory banks and each is disposed in the vicinity of a corresponding memory bank. The shared control circuit is connected to the plurality of temperature sensing circuits and a plurality of refresh circuits for refreshing the plurality of memory banks, performs calibration on the plurality of temperature sensing circuits, performs digital processing on signals for separately controlling refresh intervals for the plurality of memory banks, and transmits the processed signals to the plurality of refresh circuits. Therefore, the refresh intervals for individual channels or banks are separately or selectively controlled. Further, since the plurality of temperature sensing circuits are connected to the shared temperature control circuit, the occupied area of the circuits in a chip is reduced or minimized.

摘要翻译： 半导体存储器件包括多个存储体; 多个温度检测电路和共享控制电路。 温度感测电路对应于存储体，并且各自设置在相应的存储体的附近。 共享控制电路连接到多个温度检测电路和多个刷新电路，用于刷新多个存储体，对多个温度感测电路进行校准，对用于分别控制多个温度感测电路的刷新间隔的信号进行数字处理 的存储体，并且将处理的信号发送到多个刷新电路。 因此，单独或选择性地控制各通道或组的刷新间隔。 此外，由于多个温度感测电路连接到共享温度控制电路，所以芯片中的电路的占用面积减小或最小化。