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公开(公告)号:US11646199B2
公开(公告)日:2023-05-09
申请号:US17323178
申请日:2021-05-18
发明人: John Rozen , Martin Michael Frank , Yohei Ogawa
CPC分类号: H01L21/0228 , C23C16/405 , C23C16/45527 , H01L21/02244 , H01L21/02255 , H01L29/40114 , H01L45/1616 , H01L45/1633 , H01L29/517 , H01L45/146
摘要: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
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公开(公告)号:US11195929B2
公开(公告)日:2021-12-07
申请号:US16668473
申请日:2019-10-30
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/49 , H01L29/43 , H01L27/092 , H01L21/285 , H01L21/28 , H01L21/8238 , H01L29/423 , H01L29/66 , B82Y10/00 , H01L29/40 , H01L29/78 , H01L29/06 , H01L29/775
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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公开(公告)号:US11189482B2
公开(公告)日:2021-11-30
申请号:US16347904
申请日:2018-05-11
发明人: Masanobu Hatanaka , Yohei Ogawa , Keon-chang Lee , Nobuyuki Kato , Takakazu Yamada , John Rozen
IPC分类号: C23C16/32 , H01L21/02 , C23C16/34 , C23C16/455
摘要: A thin film formation method includes setting a film formation subject to 200° C. or higher. A first step includes changing a first state, in which a film formation material and a carrier gas are supplied so that the film formation material collects on the film formation subject, to a second state, in which the film formation material is omitted. A second step includes changing a third state, in which a hydrogen gas and a carrier gas are supplied to reduce the film formation material, to a fourth state, in which the hydrogen gas is omitted. The film formation material is any one of Al(CxH2x+1)3, Al(CxH2x+1)2H, and Al(CxH2x+1)2Cl. The first step and the second step are alternately repeated to form an aluminum carbide film on the film formation subject such that a content rate of aluminum atoms is 20 atomic percent or greater.
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公开(公告)号:US11081343B2
公开(公告)日:2021-08-03
申请号:US16516423
申请日:2019-07-19
发明人: John Rozen , Martin Michael Frank , Yohei Ogawa
摘要: Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.
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公开(公告)号:US20210020426A1
公开(公告)日:2021-01-21
申请号:US16514351
申请日:2019-07-17
发明人: Martin Michael Frank , John Rozen , Yohei Ogawa
IPC分类号: H01L21/02 , H01L29/78 , H01L45/00 , H01L29/788
摘要: Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.
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公开(公告)号:US10283610B2
公开(公告)日:2019-05-07
申请号:US15894246
申请日:2018-02-12
发明人: Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/51 , H01L29/423 , H01L21/28 , H01L29/78 , H01L29/20 , H01L29/66 , H01L21/02 , H01L21/306 , H01L29/06
摘要: A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.
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公开(公告)号:US09984940B1
公开(公告)日:2018-05-29
申请号:US15418916
申请日:2017-01-30
发明人: Jack O. Chu , Stephen M. Gates , Masanobu Hatanaka , Vijay Narayanan , Deborah A. Neumayer , Yohei Ogawa , John Rozen
CPC分类号: H01L21/845 , H01L21/02178 , H01L21/0228 , H01L21/02304 , H01L21/28008 , H01L21/28158 , H01L21/28255 , H01L21/28264 , H01L23/298 , H01L23/3171 , H01L23/3192 , H01L27/1211 , H01L29/785
摘要: A scaled dielectric stack interlayer, compatible with subsequent high temperature processing with good electrical transport & reliability properties is provided. A method for forming a conformal aSi:H passivation layer on a semiconductor device is described. A patterned semiconductor wafer is placed in in a process chamber with a first layer formed thereon and a second layer formed thereon, the first layer and the second layer being two different materials Next, a SixH(2x+2) based deposition up to a temperature of 400 degrees Celsius is used on the first layer and the second layer thereby forming a conformal aSi:H passivating layer is formed at a higher rate of deposition on the first layer selectively and a lower rate of deposit on the second layer.
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公开(公告)号:US11770986B2
公开(公告)日:2023-09-26
申请号:US17302059
申请日:2021-04-22
发明人: John Rozen , Marinus Hopstaken , Yohei Ogawa , Masanobu Hatanaka , Takashi Ando , Kazuhiro Honda
CPC分类号: H10N70/841 , H10B63/82 , H10N70/021 , H10N70/883 , H10N70/8845
摘要: A resistive switching memory stack, comprised of a bottom electrode, an oxide layer located on the bottom electrode; and a top electrode located on the oxide layer. The top electrode is comprised of a first layer, an intermediate layer located directly on the first layer, and a top layer located on top of the intermediate layer. Wherein the intermediate layer is comprised of a doped carbide active layer.
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公开(公告)号:US11362274B2
公开(公告)日:2022-06-14
申请号:US16740163
申请日:2020-01-10
发明人: John Rozen , Takashi Ando , Martin M. Frank , Yohei Ogawa
IPC分类号: H01L45/00
摘要: A laterally switching cell structure including a metal-insulator-metal stack includes an active metal oxide layer including one or more sub-stoichiometric regions. The metal oxide layer includes one or more metal-oxides deposited conformally using a mixed precursor atomic layer deposition process. A graded oxygen profile in the metal oxide layer(s) of the stack including a mirrored impurity density may be formed wherein the sub-stoichiometric region(s) include a relatively high density of impurities obtained as reaction by-products. Arrays of cell structures can be formed with no requirement for a thick active electrode, allowing for more space for a metal fill and optional selector, thereby reducing access resistance.
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公开(公告)号:US10529815B2
公开(公告)日:2020-01-07
申请号:US15799231
申请日:2017-10-31
发明人: Takashi Ando , Ruqiang Bao , Masanobu Hatanaka , Vijay Narayanan , Yohei Ogawa , John Rozen
IPC分类号: H01L29/43 , H01L29/49 , H01L27/092 , H01L21/285 , H01L21/28 , H01L21/8238 , H01L29/66 , B82Y10/00 , H01L29/40 , H01L29/423 , H01L29/78 , H01L29/775 , H01L29/06
摘要: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.
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