公开(公告)号：US20180047693A1

公开(公告)日：2018-02-15

申请号：US15792569

申请日：2017-10-24

Applicant: Intel Corporation

Inventor： Nachiket R. RARAVIKAR ,  James C. MATAYABAS, JR. ,  Akshay MATHKAR

IPC: H01L23/00 ,  H01L25/00 ,  B23K35/22 ,  H01L25/10 ,  H01L23/498 ,  H01L23/538

CPC classification number: H01L24/17 ,  B23K35/025 ,  B23K35/22 ,  B23K35/262 ,  B23K35/302 ,  B23K35/3033 ,  B23K35/3613 ,  B23K2101/40 ,  H01L23/49811 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Embodiments describe high aspect ratio and fine pitch interconnects for a semiconductor package, such as a package-on-package structure. In an embodiment, the interconnects are formed with a no-slump solder paste. In an embodiment, the no-slump solder paste is printed in an uncured state, and is then cured with a liquid phase sintering process. After being cured, the no-slump solder paste will not reflow at typical processing temperatures, such as those below approximately 400° C. According to embodiments, the no-slump solder paste includes Cu particles or spheres, a solder matrix component, a polymeric delivery vehicle, and a solvent. In an embodiment, the liquid phase sintering produces a shell of intermetallic compounds around the Cu spheres. In an embodiment, the sintering process builds a conductive metallic network through the no-slump solder paste.

公开(公告)号：US20170179080A1

公开(公告)日：2017-06-22

申请号：US14975128

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： Akshay MATHKAR ,  Nachiket Raghunath RARAVIKAR ,  Donald Tiendung TRAN ,  Jerry Lee JENSEN ,  Javier A. FALCON ,  William Nicholas LABANOK ,  Robert Leon SANKMAN ,  Robert Allen STINGEL

IPC: H01L25/065 ,  H01L23/29 ,  H05K1/02 ,  H01L21/56 ,  H01L25/00 ,  H05K1/11 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L23/293 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L25/105 ,  H01L25/50 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H05K1/0298 ,  H05K1/115

Abstract: Semiconductor package interposers having high-density and high-aspect ratio encapsulated interconnects, and semiconductor package assemblies incorporating such interposers, are described. In an example, a semiconductor package interposer includes several conductive interconnects encapsulated in a polymer substrate and having height dimensions greater than a cross-sectional dimension. The semiconductor package interposer may support a first semiconductor package above a second semiconductor package and may electrically connect die pins of the first semiconductor package to die pins of the second semiconductor package.