公开(公告)号：US20230187558A1

公开(公告)日：2023-06-15

申请号：US18163045

申请日：2023-02-01

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Michiaki SAKAMOTO ,  Takashi OKADA ,  Toshiki KANEKO ,  Tatsuya TODA

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L29/41733

Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.

公开(公告)号：US20180158959A1

公开(公告)日：2018-06-07

申请号：US15826820

申请日：2017-11-30

Applicant: Japan Display Inc.

Inventor： Takashi OKADA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/266 ,  G09G3/3233 ,  G09G3/36

CPC classification number: H01L29/78621 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133519 ,  G02F2001/13685 ,  G02F2202/104 ,  G09G3/3233 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2300/0871 ,  G09G2320/0233 ,  H01L21/26513 ,  H01L21/266 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/127 ,  H01L27/1288 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/66757 ,  H01L29/78675 ,  H01L29/78696 ,  H01L2227/323

Abstract: The purpose of the invention is to eliminate an abnormal current at an edge of a semiconductor layer in a thin film transistor. The invention is: A thin film transistor having a semiconductor layer comprising: a channel, a drain and a source are formed in the semiconductor layer, the channel has a channel length and a channel width, a LDD (Light Doped Drain) is formed between the channel and the drain or between the channel and the source, the LDD including a first LDD area, which is formed at a center of the LDD in the direction of the channel width, and a second LDD area, which is formed at an edge of the LDD in the direction of the channel width, wherein a width of the second LDD area in the channel length direction is bigger than a width of the first LDD area in the channel length direction.

公开(公告)号：US20240429321A1

公开(公告)日：2024-12-26

申请号：US18826548

申请日：2024-09-06

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Michiaki SAKAMOTO ,  Takashi OKADA ,  Toshiki KANEKO ,  Tatsuya TODA

IPC: H01L29/786 ,  H01L29/417

Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.

公开(公告)号：US20210091226A1

公开(公告)日：2021-03-25

申请号：US17111810

申请日：2020-12-04

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Michiaki SAKAMOTO ,  Takashi OKADA ,  Toshiki KANEKO ,  Tatsuya TODA

IPC: H01L29/786 ,  H01L29/417

Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.

公开(公告)号：US20180013006A1

公开(公告)日：2018-01-11

申请号：US15713077

申请日：2017-09-22

Applicant: Japan Display Inc.

Inventor： Miyuki ISHIKAWA ,  Arichika ISHIDA ,  Masayoshi FUCHI ,  Hajime WATAKABE ,  Takashi OKADA

IPC: H01L29/786 ,  H01L29/417 ,  H01L27/32 ,  H01L27/12 ,  H01L21/467 ,  H01L21/465 ,  H01L29/66 ,  H01L21/441

CPC classification number: H01L29/7869 ,  H01L21/441 ,  H01L21/465 ,  H01L21/467 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3272 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78633 ,  H01L29/78696

Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.

公开(公告)号：US20220140117A1

公开(公告)日：2022-05-05

申请号：US17511633

申请日：2021-10-27

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Takuo KAITOH ,  Ryo ONODERA ,  Takashi OKADA ,  Tomoyuki ITO ,  Toshiki KANEKO

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/385

Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.

公开(公告)号：US20210151604A1

公开(公告)日：2021-05-20

申请号：US17162340

申请日：2021-01-29

Applicant: Japan Display Inc.

Inventor： Takashi OKADA ,  Masashi TSUBUKU

IPC: H01L29/786

Abstract: A thin film transistor comprising an active layer made of an oxide semiconductor containing at least indium and gallium; an electrode layer partially formed on the active layer; an oxide film insulating layer formed on the active layer and the electrode layer; and a nitride film insulating layer formed on the oxide film insulating layer. The thin film transistor further comprises an oxygen diffusion-inhibiting film partially overlapping with the active layer in a plan view between the oxide film insulating layer and the nitride film insulating layer.

公开(公告)号：US20150380560A1

公开(公告)日：2015-12-31

申请号：US14725361

申请日：2015-05-29

Applicant: Japan Display Inc.

Inventor： Miyuki ISHIKAWA ,  Arichika ISHIDA ,  Masayoshi FUCHI ,  Hajime WATAKABE ,  Takashi OKADA

IPC: H01L29/786 ,  H01L29/417 ,  H01L21/441 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/441 ,  H01L21/465 ,  H01L21/467 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3272 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78633 ,  H01L29/78696

Abstract: According to one embodiment, a semiconductor device includes contact holes passing through a source region of a drain region of an interlayer insulating film and oxide semiconductor layer to reach an insulating substrate, wherein a source electrode and a drain electrode are formed inside the contact holes, respectively.

Abstract translation: 根据一个实施例，半导体器件包括穿过层间绝缘膜和氧化物半导体层的漏极区域的源极区域的接触孔，以到达绝缘基板，其中源极电极和漏电极形成在接触孔内部， 分别。

公开(公告)号：US20220209014A1

公开(公告)日：2022-06-30

申请号：US17561996

申请日：2021-12-27

Applicant: Japan Display Inc.

Inventor： Takuo KAITOH ,  Akihiro HANADA ,  Takashi OKADA

IPC: H01L29/786

Abstract: According to one embodiment, a semiconductor device includes a first insulating film formed of silicon nitride, a second insulating film disposed above the first insulating film and formed of silicon oxide, including a first region and a peripheral region surrounding the first region and thinner than the first region, an oxide semiconductor disposed on the second insulating film and intersecting the first region, a source electrode overlapping the peripheral region and a drain electrode overlapping the peripheral region. The first region is located between the source electrode and the drain electrode and separated from the source electrode and the drain electrode.

公开(公告)号：US20170229584A1

公开(公告)日：2017-08-10

申请号：US15427533

申请日：2017-02-08

Applicant: Japan Display Inc.

Inventor： Takashi OKADA

IPC: H01L29/786 ,  H01L29/51 ,  H01L21/02 ,  H01L29/49

CPC classification number: H01L29/78675 ,  H01L21/02532 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02631 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/78678 ,  H01L29/78693 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor includes a polycrystalline semiconductor layer, a gate electrode opposing the polycrystalline semiconductor layer, a gate insulating film provided between the gate electrode and the polycrystalline semiconductor layer and in contact with the gate electrode, and an amorphous layer provided between the gate insulating film and the polycrystalline semiconductor layer, and in contact with the gate insulating film and the polycrystalline semiconductor layer.