公开(公告)号：US09293104B2

公开(公告)日：2016-03-22

申请号：US13167023

申请日：2011-06-23

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC分类号： G09G5/10 ,  G09G3/36 ,  G09G3/34

CPC分类号： G09G3/3677 ,  G09G3/3413 ,  G09G3/3688 ,  G09G2310/0235

摘要： The liquid crystal display device includes a pixel portion including first and second regions and light sources. The first and second regions each include a liquid crystal element whose transmissivity is controlled in accordance with a voltage of an image signal and a transistor for controlling holding of the voltage, whose off-state current is extremely low. The light sources perform first and second drivings: lights whose hues are different from each other are sequentially supplied to the first region in a first rotating order and the lights are sequentially supplied to the second region in a second rotating order which is different from the first rotating order in the first driving; and a light having a single hue is supplied consecutively to one or both of the first and second regions in the second driving. The period for holding the voltage is different between the first and second drivings.

摘要翻译： 液晶显示装置包括包括第一和第二区域和光源的像素部分。 第一和第二区域各自包括根据图像信号的电压来控制透射率的液晶元件和用于控制截止电流极低的电压的保持的晶体管。 光源执行第一和第二驱动：其色调彼此不同的灯以第一旋转顺序被顺序提供给第一区域，并且以与第一和第二驱动器不同的第二旋转顺序顺序地将光提供给第二区域 在第一次驾驶时旋转顺序; 并且具有单个色调的光被连续地提供给第二驱动中的第一和第二区域中的一个或两个。 用于保持电压的时段在第一和第二驱动之间是不同的。

公开(公告)号：US09224339B2

公开(公告)日：2015-12-29

申请号：US13167019

申请日：2011-06-23

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC分类号： G06F3/041 ,  G09G3/34 ,  G09G3/36 ,  G09G3/20

CPC分类号： G09G3/3406 ,  G09G3/2025 ,  G09G3/3413 ,  G09G3/3607 ,  G09G3/3659 ,  G09G2300/0456 ,  G09G2330/021

摘要： A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.

摘要翻译： 一种液晶显示装置，包括背光源和包括第一至第2n扫描线的像素部分，其中，在表示彩色图像的第一种情况下，由第一至第n扫描线控制的第一像素被配置为表示 使用以第一旋转顺序提供的第一至第三色调中的至少一个色调的第一图像，以及由第（n + 1）至第2n扫描线控制的第二像素，被配置为使用至少一个 第一至第三色调以第二旋转顺序提供，其中，在表示单色图像的第二种情况下，由第一至第2n扫描线控制的第一和第二像素被配置为通过由 所述反射像素电极，并且其中所述第一旋转顺序与所述第二旋转顺序不同。

公开(公告)号：US08823754B2

公开(公告)日：2014-09-02

申请号：US13078206

申请日：2011-04-01

申请人： Jun Koyama ,  Hiroyuki Miyake ,  Shunpei Yamazaki

发明人： Jun Koyama ,  Hiroyuki Miyake ,  Shunpei Yamazaki

IPC分类号： G09G5/10

CPC分类号： G09G5/18 ,  G02F1/13624 ,  G02F1/136286 ,  G06F3/0412 ,  G06F3/044 ,  G06F3/045 ,  G09G3/006 ,  G09G3/3413 ,  G09G3/3426 ,  G09G3/3648 ,  G09G3/3674 ,  G09G3/3696 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/08 ,  G09G2310/0235 ,  G09G2310/0286

摘要： To increase the frequency of input of image signals in terms of design in a field-sequential liquid crystal display device. Image signals are concurrently supplied to pixels provided in a plurality of rows among pixels arranged in matrix in a pixel portion of the liquid crystal display device. Thus, the frequency of input of an image signal to each pixel can be increased without change in response speed of a transistor or the like included in the liquid crystal display device.

摘要翻译： 在现场顺序液晶显示装置的设计方面增加图像信号的输入频率。 图像信号同时提供给在液晶显示装置的像素部分中排列成矩阵的像素中的多行中提供的像素。 因此，可以在不改变包括在液晶显示装置中的晶体管等的响应速度的情况下增加对每个像素的图像信号的输入频率。

公开(公告)号：US20120326951A1

公开(公告)日：2012-12-27

申请号：US13529129

申请日：2012-06-21

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

IPC分类号： G09G3/30

CPC分类号： G02F1/1345

摘要： To provide a display device with little signal delay and a display device that can operate with low power consumption, parasitic capacitance between a common wiring that applies a common potential to a plurality of pixels and signal lines that input signals for driving the pixels is avoided. Specifically, the common wiring is routed outwardly with respect to an external input terminal to which a signal is input from the, outside, to avoid intersections of the signal lines and the common wiring. Thus, parasitic capacitance between the common wiring and the signal lines is avoided, so that the display device can operate at high speed with low power consumption.

摘要翻译： 为了提供几乎没有信号延迟的显示装置和能够以低功耗工作的显示装置，避免了对多个像素施加共同电位的公共布线与输入用于驱动像素的信号的信号线之间的寄生电容。 具体地，公共布线相对于从外部输入信号的外部输入端子向外布线，以避免信号线和公共布线的交叉。 因此，避免了公共布线和信号线之间的寄生电容，使得显示装置能够以低功耗高速运行。

公开(公告)号：US09494833B2

公开(公告)日：2016-11-15

申请号：US13529129

申请日：2012-06-21

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

IPC分类号： G02F1/1345

CPC分类号： G02F1/1345

摘要： To provide a display device with little signal delay and a display device that can operate with low power consumption, parasitic capacitance between a common wiring that applies a common potential to a plurality of pixels and signal lines that input signals for driving the pixels is avoided. Specifically, the common wiring is routed outwardly with respect to an external input terminal to which a signal is input from the, outside, to avoid intersections of the signal lines and the common wiring. Thus, parasitic capacitance between the common wiring and the signal lines is avoided, so that the display device can operate at high speed with low power consumption.

摘要翻译： 为了提供几乎没有信号延迟的显示装置和能够以低功耗工作的显示装置，避免了对多个像素施加共同电位的公共布线与输入用于驱动像素的信号的信号线之间的寄生电容。 具体地，公共布线相对于从外部输入信号的外部输入端子向外布线，以避免信号线和公共布线的交叉。 因此，避免了公共布线和信号线之间的寄生电容，使得显示装置能够以低功耗高速运行。

公开(公告)号：US09336739B2

公开(公告)日：2016-05-10

申请号：US13167020

申请日：2011-06-23

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC分类号： G09G3/36 ,  G02F1/133 ,  G02F1/1335 ,  G09G3/34

CPC分类号： G09G3/3688 ,  G02F1/13318 ,  G02F1/133514 ,  G02F2001/133622 ,  G09G3/3413 ,  G09G3/3677 ,  G09G2310/0235

摘要： An object is to provide a liquid crystal display device capable of image display according to an environment around the liquid crystal display device, e.g., in a bright environment or a dim environment. Another object is to provide a liquid crystal display device capable of displaying an image in both modes of a reflective mode in which external light is used as a light source and a transmissive mode in which a backlight is used. In order to achieve at least one of the above objects, a liquid crystal display device is provided with a region (a reflective region) where display is performed with reflection of incident light through a liquid crystal layer and a region (a transmissive region) where display is performed with transmission of light from a backlight and can switch the transmissive mode and the reflective mode. In the case where a full-color image is displayed, a pixel portion includes at least a first region and a second region, a plurality of lights of different hues are sequentially supplied to the first region according to a first order, and a plurality of lights of different hues are also sequentially supplied to the second region according to a second order which is different from the first order.

摘要翻译： 目的在于提供一种液晶显示装置，能够根据液晶显示装置周围的环境进行图像显示，例如在明亮的环境或暗淡的环境中。 另一个目的是提供一种能够以使用外部光作为光源的反射模式和使用背光的透射模式的两种模式来显示图像的液晶显示装置。 为了实现上述目的中的至少一个目的，液晶显示装置设置有通过入射光反射通过液晶层和区域（透射区域）进行显示的区域（反射区域），其中 通过来自背光的光的透射进行显示，并且可以切换透射模式和反射模式。 在显示全色图像的情况下，像素部分至少包括第一区域和第二区域，根据第一顺序将多个不同色调的光顺序地提供给第一区域，并且多个 根据与第一级不同的二次顺序将不同色调的光顺序地提供给第二区域。

公开(公告)号：US08866707B2

公开(公告)日：2014-10-21

申请号：US11389092

申请日：2006-03-27

申请人： Jun Koyama ,  Hiroyuki Miyake ,  Shunpei Yamazaki

发明人： Jun Koyama ,  Hiroyuki Miyake ,  Shunpei Yamazaki

IPC分类号： G09G3/32

CPC分类号： G09G3/3258 ,  G09G3/2022 ,  G09G3/2025 ,  G09G3/2037 ,  G09G3/2092 ,  G09G5/399 ,  G09G2300/0417 ,  G09G2300/0443 ,  G09G2300/0857 ,  G09G2340/0414 ,  G09G2340/0421 ,  G09G2340/145 ,  G09G2360/02 ,  G09G2360/18

摘要： In a display device using a delta arrangement, in a case where a circuit of a large number of elements such as a static memory is arranged every pixel, a wire becomes complicated to cause wiring delay. A shape of a pixel electrode is formed polygonally to arrange in a case where the number of elements such as a static memory is large or in a case where an area of an element required to be included in a pixel is large in a delta arrangement. The shape of the pixel electrode is arranged in a polygon so that a wire along a pixel shape can be used. Even in a case of a pixel with a large number of elements, parasitic resistance of a wire and parasitic capacitance of a wire can be reduced so that wiring delay can be solved.

摘要翻译： 在使用三角形排列的显示装置中，在每个像素布置诸如静态存储器等大量元件的电路的情况下，导线变得复杂，导致布线延迟。 在诸如静态存储器的元件的数量大的情况下或者在像素中需要包括的元件的面积以三角形排列较大的情况下，像素电极的形状被多边形成。 像素电极的形状被布置成多边形，使得可以使用沿着像素形状的线。 即使在具有大量元件的像素的情况下，也可以减少导线的寄生电阻和布线的寄生电容，从而可以解决布线延迟。

公开(公告)号：US08633480B2

公开(公告)日：2014-01-21

申请号：US12938402

申请日：2010-11-03

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake

IPC分类号： H01L29/786

CPC分类号： H01L27/1229 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G11C19/28 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/247 ,  H01L29/41733 ,  H01L29/42372 ,  H01L29/45 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

摘要： An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.

摘要翻译： 本发明的实施例的目的是制造具有高显示质量和高可靠性的半导体器件，其包括能够使用具有良好电特性的晶体管的一个衬底上能够高速操作的像素部分和驱动器电路部分，以及 高可靠性作为开关元件。 在驱动器电路部分和像素部分中形成两个晶体管，每个晶体管的一个表面侧上包括结晶区域的氧化物半导体层用作有源层。 可以通过选择确定通道位置的栅电极层的位置来选择晶体管的电特性。 因此，可以制造包括能够高速操作的驱动电路部分和一个基板上的像素部分的半导体器件。

公开(公告)号：US20110101331A1

公开(公告)日：2011-05-05

申请号：US12904579

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC分类号： H01L29/78

CPC分类号： H01L29/7869 ,  H01L21/84 ,  H01L23/552 ,  H01L23/60 ,  H01L23/66 ,  H01L25/16 ,  H01L27/0222 ,  H01L27/10873 ,  H01L27/12 ,  H01L27/1225 ,  H01L28/20 ,  H01L28/60 ,  H01L29/78609 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.

摘要翻译： 目的是减少用于LSI，CPU或存储器的晶体管的泄漏电流和寄生电容。 包括在LSI，CPU或存储器中的半导体集成电路使用使用氧化物半导体形成的晶体管来制造，所述氧化物半导体是通过从作为电子给体（供体）中除去作为电子给体（供体）的杂质而获得的内在或本质上的半导体 氧化物半导体，并且具有比硅半导体更大的能隙，并且形成在半导体衬底上。 通过形成在半导体衬底上的晶体管，并且包括具有充分降低的氢浓度的高度净化的氧化物半导体层，可以实现其由漏电流引起的功率消耗低的半导体器件。

公开(公告)号：US20110089414A1

公开(公告)日：2011-04-21

申请号：US12904565

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC分类号： H01L29/12

CPC分类号： H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

摘要： An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

摘要翻译： 目的是减少用于LSI，CPU或存储器的晶体管的泄漏电流和寄生电容。 使用薄膜晶体管制造诸如LSI，CPU或存储器的半导体集成电路，其中使用氧化物半导体形成沟道形成区域，该氧化物半导体通过去除作为电子给体的杂质而成为本征或本质上的半导体 （供体），并且具有比硅半导体更大的能隙。 通过使用具有充分降低的氢浓度的高度净化的氧化物半导体层的薄膜晶体管，可以实现由于漏电流而具有低功耗的半导体器件。