公开(公告)号：US08592266B2

公开(公告)日：2013-11-26

申请号：US12912963

申请日：2010-10-27

申请人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

发明人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L29/42368 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66606 ,  H01L29/78 ,  H01L29/7833

摘要： In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

公开(公告)号：US20120139062A1

公开(公告)日：2012-06-07

申请号：US12958608

申请日：2010-12-02

申请人： Jun Yuan ,  Dechao Guo ,  Keith Kwong Hon Wong ,  Yanfeng Wang ,  Gan Wang

发明人： Jun Yuan ,  Dechao Guo ,  Keith Kwong Hon Wong ,  Yanfeng Wang ,  Gan Wang

IPC分类号： H01L29/772 ,  H01L21/283

CPC分类号： H01L21/76897 ,  H01L21/76895 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： A method of forming a semiconductor device is provided that includes forming a replacement gate structure on portion a substrate, wherein source regions and drain regions are formed on opposing sides of the portion of the substrate that the replacement gate structure is formed on. An intralevel dielectric is formed on the substrate having an upper surface that is coplanar with an upper surface of the replacement gate structure. The replacement gate structure is removed to provide an opening to an exposed portion of the substrate. A high-k dielectric spacer is formed on sidewalls of the opening, and a gate dielectric is formed on the exposed portion of the substrate. Contacts are formed through the intralevel dielectric layer to at least one of the source region and the drain region, wherein the etch that provides the opening for the contacts is selective to the high-k dielectric spacer and the high-k dielectric capping layer.

摘要翻译： 提供一种形成半导体器件的方法，其包括在衬底的部分上形成替换栅极结构，其中源极区和漏极区形成在衬底的形成有所述替换栅极结构的部分的相对侧上。 在具有与替换栅极结构的上表面共面的上表面的基板上形成层间电介质。 替换栅极结构被去除以提供到衬底的暴露部分的开口。 在开口的侧壁上形成高k电介质垫片，并且在衬底的暴露部分上形成栅极电介质。 通过孔内介电层形成触点到源区和漏区中的至少一个，其中为触点提供开口的蚀刻对高k电介质间隔物和高k电介质封盖层是选择性的。

公开(公告)号：US20120104469A1

公开(公告)日：2012-05-03

申请号：US12912963

申请日：2010-10-27

申请人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

发明人： Zhengwen Li ,  Dechao Guo ,  Randolph F. Knarr ,  Chengwen Pei ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jian Yu ,  Jun Yuan

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/42368 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66606 ,  H01L29/78 ,  H01L29/7833

摘要： In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

摘要翻译： 在替代栅极方案中，连续材料层沉积在栅极腔中的底表面和侧壁表面上。 去除连续材料层的垂直部分以形成垂直部分不延伸到栅极腔的顶部的栅极部件。 栅组件可以用作栅极电介质或功函数金属部分，以形成增强替代栅极场效应晶体管的性能的栅极结构。

公开(公告)号：US08084346B1

公开(公告)日：2011-12-27

申请号：US12908016

申请日：2010-10-20

申请人： Dechao Guo ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jun Yuan

发明人： Dechao Guo ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong ,  Jun Yuan

IPC分类号： H01L21/28

CPC分类号： H01L29/66545 ,  H01L21/2633 ,  H01L21/31105 ,  H01L29/6653

摘要： A method includes forming a dummy gate in a dielectric layer on a substrate, the dummy gate including a sacrificial oxide layer and a dummy gate body over the sacrificial oxide layer; removing the dummy gate body resulting in a gate opening with the sacrificial oxide layer in a bottom of the gate opening; performing an off-axis sputtering to create an angled entrance on the gate opening; removing the sacrificial oxide layer; and forming a replacement gate in the gate opening.

摘要翻译： 一种方法包括在基板上的电介质层中形成虚拟栅极，所述伪栅极包括在所述牺牲氧化物层上的牺牲氧化物层和虚设栅极; 在栅极开口的底部移除伪栅极体，导致栅极与牺牲氧化物层的开口; 执行离轴溅射以在门开口上形成成角度的入口; 去除牺牲氧化物层; 并在门开口中形成替换门。

公开(公告)号：US08772149B2

公开(公告)日：2014-07-08

申请号：US13276395

申请日：2011-10-19

申请人： Eduard A. Cartier ,  Brian J. Greene ,  Dechao Guo ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong

发明人： Eduard A. Cartier ,  Brian J. Greene ,  Dechao Guo ,  Gan Wang ,  Yanfeng Wang ,  Keith Kwong Hon Wong

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/785 ,  H01L21/02323 ,  H01L21/28017 ,  H01L27/1211 ,  H01L29/6656 ,  H01L29/66795

摘要： FinFET structures and methods of manufacturing the FinFET structures are disclosed. The method includes performing an oxygen anneal process on a gate stack of a FinFET structure to induce Vt shift. The oxygen anneal process is performed after sidewall pull down and post silicide.

摘要翻译： 公开了FinFET结构和制造FinFET结构的方法。 该方法包括在FinFET结构的栅极堆叠上执行氧退火处理以引起Vt偏移。 氧退火工艺在侧壁下拉和硅化后进行。

公开(公告)号：US08481415B2

公开(公告)日：2013-07-09

申请号：US12958608

申请日：2010-12-02

申请人： Jun Yuan ,  Dechao Guo ,  Kwong Hon Wong ,  Yanfeng Wang ,  Gan Wang

发明人： Jun Yuan ,  Dechao Guo ,  Kwong Hon Wong ,  Yanfeng Wang ,  Gan Wang

IPC分类号： H01L21/00

CPC分类号： H01L21/76897 ,  H01L21/76895 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823475 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7833 ,  H01L29/7843

摘要： A method of forming a semiconductor device is provided that includes forming a replacement gate structure on portion a substrate, wherein source regions and drain regions are formed on opposing sides of the portion of the substrate that the replacement gate structure is formed on. An intralevel dielectric is formed on the substrate having an upper surface that is coplanar with an upper surface of the replacement gate structure. The replacement gate structure is removed to provide an opening to an exposed portion of the substrate. A high-k dielectric spacer is formed on sidewalls of the opening, and a gate dielectric is formed on the exposed portion of the substrate. Contacts are formed through the intralevel dielectric layer to at least one of the source region and the drain region, wherein the etch that provides the opening for the contacts is selective to the high-k dielectric spacer and the high-k dielectric capping layer.

摘要翻译： 提供一种形成半导体器件的方法，其包括在衬底的部分上形成替换栅极结构，其中源极区和漏极区形成在衬底的形成有所述替换栅极结构的部分的相对侧上。 在具有与替换栅极结构的上表面共面的上表面的基板上形成层间电介质。 替换栅极结构被去除以提供到衬底的暴露部分的开口。 在开口的侧壁上形成高k电介质垫片，并且在衬底的暴露部分上形成栅极电介质。 通过孔内介电层形成触点到源区和漏区中的至少一个，其中为触点提供开口的蚀刻对高k电介质间隔物和高k电介质封盖层是选择性的。

公开(公告)号：US08519454B2

公开(公告)日：2013-08-27

申请号：US13075443

申请日：2011-03-30

申请人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

发明人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

IPC分类号： H01L29/76 ,  H01L21/338 ,  H01L21/84

CPC分类号： H01L29/4966 ,  H01L29/66545 ,  H01L29/7843

摘要： Processes for metal fill in replacement metal gate integration schemes and resultant devices are provided herein. The method includes forming a dummy gate on a semiconductor substrate. The dummy gate includes forming a metal layer between a first material and a second material. The method further includes partially removing the dummy gate to form an opening bounded by a spacer material. The method further includes forming a recess in the spacer material to widen a portion of the opening. The method further includes removing a remaining portion of the dummy gate through the opening to form a trench having the recess forming an upper portion thereof. The method further includes filling the trench and the recess with a replacement metal gate stack.

摘要翻译： 本文提供了用于替换金属栅极集成方案和所得器件的金属填充工艺。 该方法包括在半导体衬底上形成虚拟栅极。 虚拟门包括在第一材料和第二材料之间形成金属层。 该方法还包括部分地去除伪栅极以形成由间隔物材料限定的开口。 该方法还包括在间隔物材料中形成凹槽以加宽开口的一部分。 该方法还包括通过开口去除虚拟栅极的剩余部分以形成具有形成其上部的凹部的沟槽。 该方法还包括用替换的金属栅极堆叠填充沟槽和凹部。

公开(公告)号：US09142660B2

公开(公告)日：2015-09-22

申请号：US13611113

申请日：2012-09-12

申请人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

发明人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L29/78 ,  H01L21/823487 ,  H01L21/823885 ,  H01L29/4983 ,  H01L29/66666 ,  H01L29/7827

摘要： A transistor structure is formed to include a substrate and, overlying the substrate, a source; a drain; and a channel disposed vertically between the source and the drain. The channel is coupled to a gate conductor that surrounds the channel via a layer of gate dielectric material that surrounds the channel. The gate conductor is composed of a first electrically conductive material having a first work function that surrounds a first portion of a length of the channel and a second electrically conductive material having a second work function that surrounds a second portion of the length of the channel. A method to fabricate the transistor structure is also disclosed. The transistor structure can be characterized as being a vertical field effect transistor having an asymmetric gate.

摘要翻译： 晶体管结构被形成为包括衬底和覆盖衬底的源极; 排水 以及垂直设置在源极和漏极之间的通道。 通道耦合到栅极导体，该栅极导体通过围绕该沟道的栅极电介质材料层围绕该沟道。 栅极导体由具有围绕通道长度的第一部分的第一功函数的第一导电材料和具有围绕通道长度的第二部分的第二功函数的第二导电材料组成。 还公开了制造晶体管结构的方法。 晶体管结构可以表征为具有非对称栅极的垂直场效应晶体管。

公开(公告)号：US08916405B2

公开(公告)日：2014-12-23

申请号：US13270362

申请日：2011-10-11

申请人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

发明人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

IPC分类号： H01L21/00 ,  H01L33/26 ,  H01L33/00

CPC分类号： H01L33/0041 ,  H01L33/26 ,  H01L33/34 ,  H01L33/40 ,  H01L51/0048 ,  H01L51/5203 ,  H01L51/5296

摘要： Carbon-based light emitting diodes (LEDs) and techniques for the fabrication thereof are provided. In one aspect, a LED is provided. The LED includes a substrate; an insulator layer on the substrate; a first bottom gate and a second bottom gate embedded in the insulator layer; a gate dielectric on the first bottom gate and the second bottom gate; a carbon material on the gate dielectric over the first bottom gate and the second bottom gate, wherein the carbon material serves as a channel region of the LED; and metal source and drain contacts to the carbon material.

摘要翻译： 提供了碳基发光二极管（LED）及其制造技术。 一方面，提供一种LED。 LED包括基板; 衬底上的绝缘体层; 嵌入在绝缘体层中的第一底栅极和第二底栅极; 第一底栅极和第二底栅极上的栅极电介质; 在第一底栅极和第二底栅上的栅极电介质上的碳材料，其中碳材料用作LED的沟道区域; 并且金属源极和漏极接触到碳材料。

公开(公告)号：US08866214B2

公开(公告)日：2014-10-21

申请号：US13271812

申请日：2011-10-12

申请人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

发明人： Dechao Guo ,  Shu-Jen Han ,  Keith Kwong Hon Wong ,  Jun Yuan

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/49

CPC分类号： H01L29/78 ,  H01L21/823487 ,  H01L21/823885 ,  H01L29/4983 ,  H01L29/66666 ,  H01L29/7827

摘要： A transistor structure is formed to include a substrate and, overlying the substrate, a source; a drain; and a channel disposed vertically between the source and the drain. The channel is coupled to a gate conductor that surrounds the channel via a layer of gate dielectric material that surrounds the channel. The gate conductor is composed of a first electrically conductive material having a first work function that surrounds a first portion of a length of the channel and a second electrically conductive material having a second work function that surrounds a second portion of the length of the channel. A method to fabricate the transistor structure is also disclosed. The transistor structure can be characterized as being a vertical field effect transistor having an asymmetric gate.

摘要翻译： 晶体管结构被形成为包括衬底和覆盖衬底的源极; 排水 以及垂直设置在源极和漏极之间的通道。 通道耦合到栅极导体，该栅极导体通过围绕该沟道的栅极电介质材料层围绕该沟道。 栅极导体由具有围绕通道长度的第一部分的第一功函数的第一导电材料和具有围绕通道长度的第二部分的第二功函数的第二导电材料组成。 还公开了制造晶体管结构的方法。 晶体管结构可以表征为具有非对称栅极的垂直场效应晶体管。