公开(公告)号：US20100007430A1

公开(公告)日：2010-01-14

申请号：US12492504

申请日：2009-06-26

Applicant: Kazuharu Aoki

Inventor： Kazuharu Aoki

IPC: H03H7/42

CPC classification number: H03H7/422 ,  H03H7/1758 ,  H03H7/1766 ,  H03H7/1775 ,  H03H7/1791 ,  H03H2007/013

Abstract: A balanced-unbalanced conversion circuit includes a first coupling line, an unbalanced terminal connected to the first coupling line, a ground terminal connected to the unbalanced terminal through the first coupling line, a second coupling line electromagnetically coupled to the first coupling line, a first balanced terminal connected to the second coupling line, a second balanced terminal connected to the first balanced terminal through the second coupling line, and a band-reject filter serially connected to the first coupling line to remove predetermined-band signals of high frequency signals transmitted through the first coupling line.

Abstract translation: 平衡不平衡转换电路包括第一耦合线，连接到第一耦合线的不平衡端子，通过第一耦合线连接到不平衡端子的接地端子，电磁耦合到第一耦合线的第二耦合线，第一耦合线 连接到第二耦合线的平衡端子，通过第二耦合线连接到第一平衡端子的第二平衡端子，以及串联连接到第一耦合线的带阻滤波器，以去除传输的高频信号的预定带信号 第一条耦合线。

公开(公告)号：US20070040630A1

公开(公告)日：2007-02-22

申请号：US11451942

申请日：2006-06-12

Applicant: Kazuharu Aoki

Inventor： Kazuharu Aoki

IPC: H03H7/38

CPC classification number: H03F3/60 ,  H01P5/02 ,  H03F2200/423 ,  H05K1/0237 ,  H05K1/0265 ,  H05K3/4644 ,  H05K2201/09672 ,  H05K2201/0979

Abstract: In an electronic circuit unit for transmitting power through a transmission line 103 formed of a conductor pattern, a matching circuit 101 is connected to an output end of a power amplifier 102. The matching circuit 101 comprises a first conductor pattern 14 having bend portions P1 to P4 provided on a first dielectric substrate 11 of a laminated substrate 10 which has a plurality of dielectric layers 11 to 13, and a second conductor pattern 15 disposed opposite the first conductor pattern 14 on an adjacent second dielectric layer 12, and connecting conductors 16 to 20 provided at at least bend portions P1 to P4 of the first and second conductor patterns.

Abstract translation: 在通过由导体图案形成的传输线103发送电力的电子电路单元中，匹配电路101连接到功率放大器102的输出端。 匹配电路101包括具有设置在具有多个电介质层11至13的层叠基板10的第一电介质基板11上的弯曲部分P 1至P 4的第一导体图案14和与该第二导体图案15相对设置的第二导体图案15 相邻的第二电介质层12上的第一导体图案14和设置在第一和第二导体图案的至少弯曲部分P 1至P 4的连接导体16至20。

公开(公告)号：US06359518B1

公开(公告)日：2002-03-19

申请号：US09566233

申请日：2000-05-05

Applicant: Kazuharu Aoki

Inventor： Kazuharu Aoki

IPC: H03F304

CPC classification number: H04L27/22

Abstract: A signal level adjusting circuit includes a first amplifying stage in which output electrodes of output stage transistors are connected to ground through current supplies and are connected with respective output terminals, and a DC voltage at the output terminals has a first voltage value; a second amplifying stage in which control electrodes of input stage transistors are connected with respective input terminals, and a DC voltage at the input terminals has a second voltage value; and a coupling stage, connected between the output terminals and the input terminals, which includes at least one series resistor. The first amplifying stage is incorporated in a bipolar IC, and the second amplifying stage is incorporated in a CMOS IC.

Abstract translation: 信号电平调整电路包括第一放大级，其中输出级晶体管的输出电极通过电流源连接到地，并与相应的输出端连接，输出端的直流电压具有第一电压值; 第二放大级，其中输入级晶体管的控制电极与各个输入端子连接，并且输入端子处的DC电压具有第二电压值; 以及连接在输出端子和输入端子之间的耦合级，其包括至少一个串联电阻器。 第一放大级并入双极IC，第二放大级并入CMOS IC。

公开(公告)号：US08018297B2

公开(公告)日：2011-09-13

申请号：US12492504

申请日：2009-06-26

Applicant: Kazuharu Aoki

Inventor： Kazuharu Aoki

IPC: H03H7/42 ,  H01P5/00

CPC classification number: H03H7/422 ,  H03H7/1758 ,  H03H7/1766 ,  H03H7/1775 ,  H03H7/1791 ,  H03H2007/013

Abstract: A balanced-unbalanced conversion circuit includes a first coupling line, an unbalanced terminal connected to the first coupling line, a ground terminal connected to the unbalanced terminal through the first coupling line, a second coupling line electromagnetically coupled to the first coupling line, a first balanced terminal connected to the second coupling line, a second balanced terminal connected to the first balanced terminal through the second coupling line, and a band-reject filter serially connected to the first coupling line to remove predetermined-band signals of high frequency signals transmitted through the first coupling line.

Abstract translation: 平衡不平衡转换电路包括第一耦合线，连接到第一耦合线的不平衡端子，通过第一耦合线连接到不平衡端子的接地端子，电磁耦合到第一耦合线的第二耦合线，第一耦合线 连接到第二耦合线的平衡端子，通过第二耦合线连接到第一平衡端子的第二平衡端子，以及串联连接到第一耦合线的带阻滤波器，以去除传输的高频信号的预定带信号 第一条耦合线。

公开(公告)号：US06236848B1

公开(公告)日：2001-05-22

申请号：US08816603

申请日：1997-03-13

Applicant: Sadao Igarashi ,  Kazuharu Aoki

Inventor： Sadao Igarashi ,  Kazuharu Aoki

IPC: H04B116

CPC classification number: H04L27/0002 ,  H04B1/16 ,  H04B1/40

Abstract: A receive integrated circuit for a mobile telephone comprising a variable gain amplifier for amplifying a received signal with a variable gain, a low-pass filter for attenuating harmonic components of the signal amplifier by the variable gain amplifier, and a QPSK demodulator for demodulating by quadri-phase shift keying the signal having passed through the low-pass filter, wherein signal lines interconnecting the variable gain amplifier, the low-pass filter and the quadri-phase shift keying demodulator are balanced.

Abstract translation: 一种用于移动电话的接收集成电路，包括用于以可变增益放大接收信号的可变增益放大器，用于衰减可变增益放大器的信号放大器的谐波分量的低通滤波器，以及用于通过四通道解调的QPSK解调器 相移键控已经通过低通滤波器的信号，其中互连可变增益放大器，低通滤波器和四相移键控解调器的信号线被平衡。

公开(公告)号：US5900781A

公开(公告)日：1999-05-04

申请号：US814250

申请日：1997-03-11

Applicant: Sadao Igarashi ,  Kazuharu Aoki ,  Satoshi Urabe

Inventor： Sadao Igarashi ,  Kazuharu Aoki ,  Satoshi Urabe

IPC: H03G3/30 ,  H03F3/19 ,  H03F3/45 ,  H03F3/62 ,  H03G1/00 ,  H03G3/10

CPC classification number: H03F3/45089 ,  H03F3/62 ,  H03G1/0017 ,  H03G1/0023 ,  H03F2200/294 ,  H03F2200/372

Abstract: A multistage amplifier circuit comprises a current constant mode variable amplifying circuit for amplifying an input signal and current variable mode variable amplifying circuits and for further amplifying the signal amplified by the first variable amplifying circuit. An AGC voltage VAGC is commonly applied between the bases and emitters of an amplification degree control transistor of the current constant mode variable amplifying circuit and amplification degree control transistors of the current variable mode amplifying circuits. Collector currents of the transistors change exponentially with respect to the linearly-varied AGC voltage VAGC. Further, currents each proportional to the collector current of the transistor flow in the transistors. Thus, the gain PG �dB! of the current constant mode variable amplifying circuit changes linearly with the AGC voltage VAGC.

Abstract translation: 多级放大器电路包括用于放大输入信号的电流恒定模式可变放大电路和电流可变模式可变放大电路，并用于进一步放大由第一可变放大电路放大的信号。 AGC电压VAGC通常被施加在电流恒定模式可变放大电路的放大度控制晶体管和电流可变模式放大电路的放大度控制晶体管的基极和发射极之间。 晶体管的集电极电流相对于线性变化的AGC电压VAGC呈指数变化。 此外，与晶体管的集电极电流成比例的电流在晶体管中流动。 因此，电流恒定模式可变放大电路的增益PG [dB]随着AGC电压VAGC而线性变化。

公开(公告)号：US4359701A

公开(公告)日：1982-11-16

申请号：US212099

申请日：1980-12-02

Applicant: Kazuharu Aoki

Inventor： Kazuharu Aoki

IPC: H04B1/08 ,  H01P5/02 ,  H01P7/04 ,  H03J1/00 ,  H03J3/18 ,  H03J3/20 ,  H04N5/64 ,  H05K1/02 ,  H05K1/18 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K1/184 ,  H01P5/02 ,  H03J3/185 ,  H05K1/0243 ,  H01R12/523 ,  H05K1/0237 ,  H05K2201/043 ,  H05K2201/10015 ,  H05K2201/10174 ,  H05K2201/10295 ,  H05K2201/10371 ,  H05K2201/10454 ,  H05K2201/10636 ,  H05K2201/10643 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/4046 ,  Y02P70/611

Abstract: A printed circuit board lamination consisting of upper and lower printed circuit boards is provided with an area consisting of the sole lower printed circuit board, and a varactor diode and a resonance rod portion parallel to the lamination are arranged in this area. Thus, the length of lead of the varactor diode is reduced in effect, and also the effects of variation of the dielectric constant of the printed circuit board due to changes of the temperature thereof and relative humidity are reduced.

Abstract translation: 由上下印刷电路板组成的印刷电路板层叠件设置有由底部下印刷电路板组成的区域，并且在该区域中布置变容二极管和平行于层压件的共振杆部分。 因此，变容二极管的引线长度有效地降低，并且由于温度和相对湿度的变化也导致印刷电路板的介电常数的变化的影响降低。

公开(公告)号：US07400197B2

公开(公告)日：2008-07-15

申请号：US11387938

申请日：2006-03-22

Applicant: Shoichi Asano ,  Kazuharu Aoki

Inventor： Shoichi Asano ,  Kazuharu Aoki

IPC: H03G3/30

CPC classification number: H03F3/24 ,  H03F1/30 ,  H03F1/302 ,  H03F3/04 ,  H03F3/45475 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/504 ,  H03G1/04

Abstract: A gain control circuit capable of keeping a constant gain without being affected by ambient temperature includes a variable resistor element connected to a power supply terminal, a control unit for controlling the resistance value of the variable resistor element on the basis of a gain control voltage, an amplifying transistor that is supplied with a power supply voltage through the variable resistor element, a current detecting resistor that is interposed between the variable resistor element and a collector of the amplifying transistor, and a voltage detecting unit that detects a drop dropped by the current detecting resistor. The dropped voltage detected by the voltage detecting unit is fed back to the control unit to control the resistance value of the variable resistor element such that a current flowing through the current detecting resistor does not vary.

Abstract translation: 能够在不受环境温度影响的情况下保持恒定增益的增益控制电路包括连接到电源端子的可变电阻器元件，用于基于增益控制电压来控制可变电阻器元件的电阻值的控制单元， 通过可变电阻元件供给电源电压的放大晶体管，插在可变电阻元件和放大晶体管的集电极之间的电流检测电阻器，以及检测由电流下降的电压的电压检测单元 检测电阻。 由电压检测单元检测到的下降电压被反馈到控制单元以控制可变电阻元件的电阻值，使得流过电流检测电阻器的电流不变。

公开(公告)号：US20060255858A1

公开(公告)日：2006-11-16

申请号：US11387938

申请日：2006-03-22

Applicant: Shoichi Asano ,  Kazuharu Aoki

Inventor： Shoichi Asano ,  Kazuharu Aoki

IPC: H03F3/04 ,  H03F3/45

CPC classification number: H03F3/24 ,  H03F1/30 ,  H03F1/302 ,  H03F3/04 ,  H03F3/45475 ,  H03F2200/447 ,  H03F2200/451 ,  H03F2200/504 ,  H03G1/04

Abstract: A gain control circuit capable of keeping a constant gain without being affected by ambient temperature includes a variable resistor element connected to a power supply terminal, a control unit for controlling the resistance value of the variable resistor element on the basis of a gain control voltage, an amplifying transistor that is supplied with a power supply voltage through the variable resistor element, a current detecting resistor that is interposed between the variable resistor element and a collector of the amplifying transistor, and a voltage detecting unit that detects a drop dropped by the current detecting resistor. The dropped voltage detected by the voltage detecting unit is fed back to the control unit to control the resistance value of the variable resistor element such that a current flowing through the current detecting resistor does not vary.

Abstract translation: 能够在不受环境温度影响的情况下保持恒定增益的增益控制电路包括连接到电源端子的可变电阻器元件，用于基于增益控制电压来控制可变电阻器元件的电阻值的控制单元， 通过可变电阻元件供给电源电压的放大晶体管，插在可变电阻元件和放大晶体管的集电极之间的电流检测电阻器，以及检测由电流下降的电压的电压检测单元 检测电阻。 由电压检测单元检测到的下降电压被反馈到控制单元以控制可变电阻元件的电阻值，使得流过电流检测电阻器的电流不变。

公开(公告)号：US06177837B1

公开(公告)日：2001-01-23

申请号：US09320260

申请日：1999-05-26

Applicant: Kazuharu Aoki ,  Shoichi Asano

Inventor： Kazuharu Aoki ,  Shoichi Asano

IPC: H03F122

CPC classification number: H03F1/22 ,  H03H11/1213

Abstract: A feedback circuit is connected between the input electrode of amplifying element of an amplifying circuit of the initial stage and the output electrode of amplifying element of an amplifying circuit of the final stage. The feedback circuit is structured by a serial circuit of a voltage dropping means resulting in almost constant voltage drop regardless of an increase or decrease of current and a feedback resistor, and a bias voltage is supplied, via the feedback circuit, to an input electrode of the amplifying element in the amplifying circuit of the initial stage from an output electrode of the amplifying element in the amplifying circuit of the final stage. Thereby, current dissipation is reduced and signal loss is lowered.

Abstract translation: 反馈电路连接在初级放大电路的放大元件的输入电极和最终级的放大电路的放大元件的输出电极之间。 反馈电路由降压装置的串联电路构成，无论电流的增加或减少以及反馈电阻如何，导致几乎恒定的电压降，并且经由反馈电路将偏置电压提供给输入电极 在最终级的放大电路中的放大元件的输出电极的放大电路中的放大元件。 从而，电流消耗降低，信号损失降低。