Through-wafer vias
    1.
    发明授权
    Through-wafer vias 有权
    通晶圆通孔

    公开(公告)号:US07741722B2

    公开(公告)日:2010-06-22

    申请号:US11690181

    申请日:2007-03-23

    IPC分类号: H01L23/48

    摘要: A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.

    摘要翻译: 一种晶片通孔结构及其形成方法。 贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。 顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。 贯通晶片通孔结构还包括在开口中的通晶片通孔。 贯通晶片通孔具有矩形板的形状。 贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。 贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。 第一,第二和第三参考方向彼此垂直。

    THROUGH-WAFER VIAS
    2.
    发明申请
    THROUGH-WAFER VIAS 有权
    通过六角形

    公开(公告)号:US20080274583A1

    公开(公告)日:2008-11-06

    申请号:US11690181

    申请日:2007-03-23

    IPC分类号: H01L21/00

    摘要: A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.

    摘要翻译: 一种晶片通孔结构及其形成方法。 贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。 顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。 贯通晶片通孔结构还包括在开口中的通晶片通孔。 贯通晶片通孔具有矩形板的形状。 贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。 贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。 第一,第二和第三参考方向彼此垂直。

    Through substrate annular via including plug filler
    3.
    发明授权
    Through substrate annular via including plug filler 有权
    通过基底环形通孔,包括塞子填料

    公开(公告)号:US07898063B2

    公开(公告)日:2011-03-01

    申请号:US12032642

    申请日:2008-02-16

    IPC分类号: H01L23/48

    摘要: A through substrate via includes an annular conductor layer at a periphery of a through substrate aperture, and a plug layer surrounded by the annular conductor layer. A method for fabricating the through substrate via includes forming a blind aperture within a substrate and successively forming and subsequently planarizing within the blind aperture a conformal conductor layer that does not fill the aperture and plug layer that does fill the aperture. The backside of the substrate may then be planarized to expose at least the planarized conformal conductor layer.

    摘要翻译: 贯通基板通孔包括在通孔基板孔周边的环形导体层和被环形导体层围绕的塞子层。 一种用于制造贯通衬底通孔的方法,包括在衬底内形成盲孔,并在盲孔内依次形成并随后在盲孔内进行平面化,该保形导体层不填充填充孔的孔和塞层。 然后可以将衬底的背面平坦化以至少露出平坦化的共形导体层。

    THROUGH SUBSTRATE ANNULAR VIA INCLUDING PLUG FILLER
    4.
    发明申请
    THROUGH SUBSTRATE ANNULAR VIA INCLUDING PLUG FILLER 审中-公开
    通过包括插入式灌装机在内的基板

    公开(公告)号:US20110129996A1

    公开(公告)日:2011-06-02

    申请号:US13025678

    申请日:2011-02-11

    IPC分类号: H01L21/28

    摘要: A through substrate via includes an annular conductor layer at a periphery of a through substrate aperture, and a plug layer surrounded by the annular conductor layer. A method for fabricating the through substrate via includes forming a blind aperture within a substrate and successively forming and subsequently planarizing within the blind aperture a conformal conductor layer that does not fill the aperture and plug layer that does fill the aperture. The backside of the substrate may then be planarized to expose at least the planarized conformal conductor layer.

    摘要翻译: 贯通基板通孔包括在通孔基板孔周边的环形导体层和被环形导体层围绕的塞子层。 一种用于制造贯通衬底通孔的方法,包括在衬底内形成盲孔,并在盲孔内依次形成并随后在盲孔内进行平面化,该保形导体层不填充填充孔的孔和塞层。 然后可以将衬底的背面平坦化以至少露出平坦化的共形导体层。

    THROUGH SUBSTRATE ANNULAR VIA INCLUDING PLUG FILLER
    5.
    发明申请
    THROUGH SUBSTRATE ANNULAR VIA INCLUDING PLUG FILLER 有权
    通过包括插入式灌装机在内的基板

    公开(公告)号:US20090206488A1

    公开(公告)日:2009-08-20

    申请号:US12032642

    申请日:2008-02-16

    IPC分类号: H01L21/768 H01L23/538

    摘要: A through substrate via includes an annular conductor layer at a periphery of a through substrate aperture, and a plug layer surrounded by the annular conductor layer. A method for fabricating the through substrate via includes forming a blind aperture within a substrate and successively forming and subsequently planarizing within the blind aperture a conformal conductor layer that does not fill the aperture and plug layer that does fill the aperture. The backside of the substrate may then be planarized to expose at least the planarized conformal conductor layer.

    摘要翻译: 贯通基板通孔包括在通孔基板孔周边的环形导体层和被环形导体层围绕的塞子层。 一种用于制造贯通衬底通孔的方法,包括在衬底内形成盲孔,并在盲孔内依次形成并随后在盲孔内进行平面化,该保形导体层不填充填充孔的孔和塞层。 然后可以将衬底的背面平坦化以至少露出平坦化的共形导体层。

    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same
    8.
    发明授权
    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same 有权
    用于半导体器件和包括其的MIM电容器的封装金属结构

    公开(公告)号:US06756624B2

    公开(公告)日:2004-06-29

    申请号:US10409010

    申请日:2003-04-07

    IPC分类号: H01L27108

    摘要: A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

    摘要翻译: 描述了一种在衬底中形成的特征中制造封装金属结构的方法。 特征的侧壁和底部被阻挡层覆盖,并且该特征被金属填充,优选地通过电镀。 在金属中形成凹部,并且沉积附加的阻挡层,覆盖金属的顶表面并与第一阻挡层接触。 优选通过化学机械抛光将附加阻挡层平坦化。 该方法可用于制造MIM电容器,其中封装的金属结构用作电容器的下板。 第二衬底层沉积在衬底的顶表面上,具有覆盖封装的金属结构的开口。 介电层沉积在开口中,覆盖其底部的封装金属结构。 作为电容器的上板的附加层被沉积以覆盖电介质层并填充开口。 介电层和附加层优选通过CMP平坦化。

    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same
    10.
    发明授权
    Encapsulated metal structures for semiconductor devices and MIM capacitors including the same 失效
    用于半导体器件和包括其的MIM电容器的封装金属结构

    公开(公告)号:US06368953B1

    公开(公告)日:2002-04-09

    申请号:US09567466

    申请日:2000-05-09

    IPC分类号: H01L214763

    摘要: A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

    摘要翻译: 描述了一种在衬底中形成的特征中制造封装金属结构的方法。 特征的侧壁和底部被阻挡层覆盖,并且该特征被金属填充,优选地通过电镀。 在金属中形成凹部,并且沉积附加的阻挡层,覆盖金属的顶表面并与第一阻挡层接触。 优选通过化学机械抛光将附加阻挡层平坦化。 该方法可用于制造MIM电容器,其中封装的金属结构用作电容器的下板。 第二衬底层沉积在衬底的顶表面上,具有覆盖封装的金属结构的开口。 介电层沉积在开口中,覆盖其底部的封装金属结构。 作为电容器的上板的附加层被沉积以覆盖电介质层并填充开口。 介电层和附加层优选通过CMP平坦化。