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    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM
    2.
    发明申请
    MEMORY DEVICE, MEMORY SYSTEM INCLUDING MEMORY DEVICE AND VEHICLE-BASED SYSTEM INCLUDING MEMORY SYSTEM 有权

    公开(公告)号：US20210133128A1

    公开(公告)日：2021-05-06

    申请号：US16853807

    申请日：2020-04-21

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： YOUNGMIN JO ,  DAESEOK BYEON ,  TONGSUNG KIM

    IPC: G06F13/16 ,  G06N3/04 ,  H01L25/065 ,  H01L25/18

    Abstract: A memory device provides a first memory area and a second memory area. A smart buffer includes; a priority setting unit receiving sensing data and a corresponding weight, determining a priority of the sensing data based on the corresponding weight, and classifying the sensing data as first priority sensing data or second priority sensing data based on the priority, and a channel controller allocating a channel to a first channel group, allocating another channel to a second channel group, assigning the first channel group to process the first priority sensing data in relation to the first memory area, and assigning the second channel group to process the second priority sensing data in relation to the second memory area.

    INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING SAME
    6.
    发明申请
    INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING SAME 有权

    公开(公告)号：US20220122967A1

    公开(公告)日：2022-04-21

    申请号：US17224558

    申请日：2021-04-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： CHANG-BUM KIM ,  SUNGHOON KIM ,  DAESEOK BYEON

    IPC: H01L27/07 ,  H01L29/06

    Abstract: An integrated circuit includes; a substrate including a single active region, a first active resistor formed on the substrate, and a transistor including a first junction area in the single active region. The first active resistor and the transistor are electrically connected through the first junction area. The first active resistor is formed between a first node and a second node included in the first junction area. The first node is connected to a first contact, and the second node is connected to a second contact.

    SEMICONDUCTOR DIE, SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DIE, SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210066145A1

    公开(公告)日：2021-03-04

    申请号：US17006186

    申请日：2020-08-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： TAEHYO KIM ,  CHANHO KIM ,  DAESEOK BYEON

    IPC: H01L21/66 ,  H01L23/00 ,  H01L27/11573

    Abstract: A nonvolatile memory device includes a memory cell region including first pads and a peripheral circuit region including second pads. The regions comprises switches that are electrically connected with the pads, respectively, a test signal generator that generates test signals and to transmit the test signals to the switches, internal circuits that receive first signals through the pads and the switches, to perform operations based on the first signals, and to output second signals through the switches and the pads based on a result of the operations, and a switch controller that controls the switches so that the pads communicate with the test signal generator during a test operation and that the pads communicate with the internal circuits after a completion of the test operation. The peripheral circuit region is vertically connected to the memory cell region by the first metal pads and the second metal pads directly.

    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND CONTROLLER
    8.
    发明申请
    STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND CONTROLLER 有权
    包含非易失性存储器件和控制器的存储器件

    公开(公告)号：US20170004886A1

    公开(公告)日：2017-01-05

    申请号：US15085498

    申请日：2016-03-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： DONGHUN KWAK ,  MYOUNG-WON YOON ,  DAESEOK BYEON ,  CHIWEON YOON

    IPC: G11C16/34 ,  G11C16/26 ,  G11C16/04 ,  G11C16/16

    CPC classification number: G11C16/3404 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3459 ,  G11C16/349 ,  G11C16/3495

    Abstract: A storage device includes a nonvolatile memory device including memory blocks and a controller configured to control the nonvolatile memory device. Each of the memory blocks includes a plurality of cell strings each including at least one selection transistor and a plurality of memory cells stacked on a substrate in a direction perpendicular to the substrate. The controller controls the nonvolatile memory device to perform a read operation on some of selection transistors of a selected one of the memory blocks and to perform a program operation on the selection transistors of the selected memory block according to a result of the read operation.

    Abstract translation: 存储装置包括包括存储器块的非易失性存储器件和被配置为控制非易失性存储器件的控制器。 每个存储块包括多个单元串，每个单元串包括至少一个选择晶体管和沿垂直于该基板的方向堆叠在基板上的多个存储单元。 控制器控制非易失性存储器件对所选存储块中的一些选择晶体管执行读操作，并根据读操作的结果对所选存储块的选择晶体管执行编程操作。

    MEMORY DEVICE INCLUDING PASS TRANSISTOR CIRCUIT
    9.
    发明申请
    MEMORY DEVICE INCLUDING PASS TRANSISTOR CIRCUIT 有权

    公开(公告)号：US20220406385A1

    公开(公告)日：2022-12-22

    申请号：US17898885

    申请日：2022-08-30

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： SEUNGYEON KIM ,  DAESEOK BYEON ,  PANSUK KWAK ,  HONGSOO JEON

    IPC: G11C16/24 ,  G11C5/06 ,  G11C16/26 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A memory device includes; a memory cell array including a first memory block and a second memory block adjacently disposed in a first direction, driving signal lines respectively corresponding to vertically stacked word lines, and a pass transistor circuit including an odd number of pass transistor groups and connected between the driving signal lines and the memory cell array. One of the odd number of pass transistor groups includes a first pass transistor connected between a first word line of the first memory block and a first driving signal line among the driving signal lines, and a second pass transistor connected between a first word line of the second memory block and the first driving signal line adjacently disposed to the first pass transistor in a second direction.

    SEMICONDUCTOR DEVICE
    10.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220173100A1

    公开(公告)日：2022-06-02

    申请号：US17536413

    申请日：2021-11-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： AHREUM KIM ,  SUNGHOON KIM ,  DAESEOK BYEON

    IPC: H01L27/092

    Abstract: A semiconductor device includes a substrate, an N-well area formed in the substrate, a first P-channel metal oxide semiconductor (PMOS) transistor having active regions formed in the N-well area, and a first N-channel metal oxide semiconductor (NMOS) transistor having active regions formed in the substrate. The first NMOS transistor includes a first N-type active region overlapping each of the substrate and the N-well area, when viewed from above a plane parallel to a top surface of the substrate.

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