公开(公告)号：US20230115743A1

公开(公告)日：2023-04-13

申请号：US17834987

申请日：2022-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Hyunho PARK ,  Minchan GWAK ,  Seon-Bae KIM ,  Jinyoung PARK

IPC: H01L29/786 ,  H01L29/423

Abstract: A semiconductor device may include first and second active regions on a substrate, first and second active patterns on the first and second active regions, first and second source/drain patterns on the first and second active patterns, first and second silicide patterns on the first and second source/drain patterns, and first and second active contacts coupled to the first and second source/drain patterns. A lowermost portion of the first active contact is at a level higher than that of a lowermost portion of the second active contact. A thickness of the first silicide pattern is greater than that of the second silicide pattern.

公开(公告)号：US20230047343A1

公开(公告)日：2023-02-16

申请号：US17734473

申请日：2022-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Minchan GWAK ,  Seonbae KIM ,  Jinyoung PARK ,  Hyunho PARK

IPC: H01L23/535 ,  H01L23/528 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/66

Abstract: A semiconductor device includes active regions extending in a first direction on a substrate; a gate electrode intersecting the active regions on the substrate, extending in a second direction, and including a contact region protruding upwardly; and an interconnection line on the gate electrode and connected to the contact region, wherein the contact region includes a lower region having a first width in the second direction and an upper region located on the lower region and having a second width smaller than the first width in the second direction, and wherein at least one side surface of the contact region in the second direction has a point at which an inclination or a curvature is changed between the lower region and the upper region.

公开(公告)号：US20220406888A1

公开(公告)日：2022-12-22

申请号：US17574074

申请日：2022-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Seonbae KIM ,  Sungmin KIM ,  Jinyoung PARK ,  Hyunho PARK

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern provided on a substrate having an upper surface; an insulation pattern provided above the substrate and contacting an upper surface of the active pattern; channels spaced apart from each other along a direction perpendicular to the upper surface of the substrate, each of the channels including a material provided in the active pattern; and a gate structure contacting an upper surface of the insulation pattern, an upper surface of the channels, a lower surface of the channels, and sidewalls of the channels opposite to each other. A first distance between an upper surface of the active pattern and a lowermost one of the channels is greater than a second distance between an upper surface of one of the channels and a lower surface of an adjacent channel.

公开(公告)号：US20210013206A1

公开(公告)日：2021-01-14

申请号：US17038435

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： HeonJong SHIN ,  Sunghun JUNG ,  Minchan GWAK ,  Yongsik JEONG ,  Sangwon JEE ,  Sora YOU ,  Doohyun LEE

IPC: H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L23/522 ,  H01L29/417

Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.

公开(公告)号：US20250107150A1

公开(公告)日：2025-03-27

申请号：US18650292

申请日：2024-04-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daesik KIM ,  Seonbae KIM ,  Taeyong KWON ,  Changhee KIM ,  Doohyun LEE ,  Jaehyun KANG ,  Jinyoung PARK ,  Hyunho PARK ,  Jimin YU ,  Jinwook LEE ,  Seunghyun HWANG

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/66 ,  H01L29/775

Abstract: A semiconductor device includes a substrate including an active region, a gate structure on the substrate, a plurality of channel layers on the active region, spaced apart from each other and surrounded by the gate structure, a source/drain region in a region at which the active region is recessed, on at least one side of the gate structure, and connected to the channel layers, and a contact plug partially recessing the source/drain region from an upper surface of the source/drain region, electrically connected to the source/drain region, and including a metal-semiconductor compound layer along a recessed surface of the source/drain region and a contact conductor layer on the metal-semiconductor compound layer, wherein the metal-semiconductor compound layer has a first thickness on a side surface of the contact conductive layer and a second thickness on a bottom surface of the contact plug, the second thickness being smaller than the first thickness.

公开(公告)号：US20240321980A1

公开(公告)日：2024-09-26

申请号：US18596772

申请日：2024-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Jaehyun KANG ,  Seonbae KIM ,  Wangseop LIM ,  Seunghyun HWANG

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/41733 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775

Abstract: An integrated circuit device includes a substrate having a main surface and fin-type active regions protruding in a vertical direction from the main surface and extending lengthwise in a first horizontal direction, gate lines extending parallel to one another in a second horizontal direction perpendicular to the first horizontal direction and crossing the fin-type active regions, source/drain regions on the fin-type active regions between the gate lines, an inter-gate insulation layer covering the source/drain regions between the gate lines, active contacts on and in contact with the source/drain regions, and a buried insulation block between adjacent ones of the source/drain regions in the second horizontal direction, the buried insulation block penetrating through at least a portion of the inter-gate insulation layer and having a top surface in contact with a first active contact of the active contacts.

公开(公告)号：US20230231023A1

公开(公告)日：2023-07-20

申请号：US18085331

申请日：2022-12-20

Applicant: SAMSUNG ELECTRONICS CO, LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Seonbae KIM ,  Jinyoung PARK ,  Hyunho PARK ,  Jimin YU ,  Jaeran JANG

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/41733 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/401 ,  H01L29/66439

Abstract: A semiconductor device includes a substrate, active regions extending in a first horizontal direction on the substrate, and including first and second active regions spaced apart from each other in a second horizontal direction perpendicular to the first horizontal direction, and third and fourth active regions spaced apart from each other in the second horizontal direction, first to fourth source/drain regions on the first to fourth active regions, first to fourth contact plugs connected to the first to fourth source/drain regions, a first isolation insulating pattern disposed between the first and second contact plugs, and a second isolation insulating pattern disposed between the third and fourth contact plugs, wherein a first length of the first isolation insulating pattern is smaller than a second length of the second isolation insulating pattern in a vertical direction.

公开(公告)号：US20210193808A1

公开(公告)日：2021-06-24

申请号：US17175850

申请日：2021-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inchan HWANG ,  Heonjong SHIN ,  Sunghun JUNG ,  Doohyun LEE ,  Hwichan JUN ,  Hakyoon AHN

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L21/285 ,  H01L29/06 ,  H01L27/092 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/78

Abstract: A semiconductor device is disclosed. The semiconductor device may include a substrate including a first active pattern, the first active pattern vertically protruding from a top surface of the substrate, a first source/drain pattern filling a first recess, which is formed in an upper portion of the first active pattern, a first metal silicide layer on the first source/drain pattern, the first metal silicide layer including a first portion and a second portion, which are located on a first surface of the first source/drain pattern, and a first contact in contact with the second portion of the first metal silicide layer. A thickness of the first portion may be different from a thickness of the second portion.

公开(公告)号：US20240321873A1

公开(公告)日：2024-09-26

申请号：US18429611

申请日：2024-02-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong SHIN ,  Juneyoung PARK ,  Jaeran JANG

IPC: H01L27/088 ,  H01L21/8234 ,  H01L23/48 ,  H01L23/522

CPC classification number: H01L27/088 ,  H01L21/76895 ,  H01L21/76898 ,  H01L21/823456 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696 ,  H01L23/5226

Abstract: An integrated circuit device, including a substrate having a plurality of device regions extending in a first horizontal direction, a plurality of gate electrodes on the plurality of device regions extending in a second horizontal direction that is orthogonal to the first horizontal direction, a plurality of source/drain regions between a pair of gate electrodes adjacent to each other in the first horizontal direction among the plurality of gate electrodes, the plurality of source/drain regions being on portions of the plurality of device regions, a plurality of gate cut regions cutting the plurality of gate electrodes and extending in the first horizontal direction, and a plurality of contact structures including a plurality of contact body portions and a plurality of contact finger portions, the plurality of contact body portions filling the plurality of gate cut regions and extending in the first horizontal direction.

公开(公告)号：US20240030345A1

公开(公告)日：2024-01-25

申请号：US18112312

申请日：2023-02-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doohyun LEE ,  Heonjong Shin ,  Seon-Bae Kim ,  Jaeran Jang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/08

CPC classification number: H01L29/78391 ,  H01L29/66545 ,  H01L29/0847 ,  H01L29/6656

Abstract: In some embodiments, the semiconductor device includes a substrate comprising a cell region, a dummy region spaced apart from the cell region in a first direction, and a border region between the cell region and the dummy region, an active pattern on the cell region, a device isolation layer on the substrate, source/drain patterns on the active pattern and channel patterns between the source/drain patterns, cell gate electrodes crossing the channel patterns in a second direction, active contacts disposed on the cell region and between the cell gate electrodes and coupled to the source/drain patterns, dummy gate electrodes on the dummy region and on the device isolation layer, dummy contacts on the dummy region and on a side surface of each of the dummy gate electrodes, an interlayer insulating layer on the side surface of each of the dummy gate electrodes, and a dam structure on the border region.