公开(公告)号：US11373980B2

公开(公告)日：2022-06-28

申请号：US16744623

申请日：2020-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Youn Kim ,  Dong Kyu Kim ,  Jin-Woo Park ,  Min Jun Bae ,  Gwang Jae Jeon

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/544

Abstract: A semiconductor package includes a first semiconductor chip including a first surface and a second surface which face each other, an alignment pattern formed on the first surface, a first redistribution layer arranged on the first surface of the first semiconductor chip, a second redistribution layer arranged on the second surface of the first semiconductor chip, and electrically connected with the semiconductor chip, and a first dielectric layer including the alignment pattern between the first redistribution layer and the semiconductor chip, the alignment pattern overlapping the first surface of the first semiconductor chip.

公开(公告)号：US20240170413A1

公开(公告)日：2024-05-23

申请号：US18368376

申请日：2023-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Gwon JANG ,  Jong Youn Kim ,  Seok Kyu Choi

IPC: H01L23/544 ,  H01L25/10 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/544 ,  H01L25/105 ,  H01L25/18 ,  H10B80/00 ,  H01L24/16 ,  H01L2223/54413 ,  H01L2225/1035 ,  H01L2225/1058

Abstract: Provided is a semiconductor package including a first wiring structure extending in a first direction and a second crossing the first direction, a first semiconductor chip stacked on the first wiring structure in a third direction different from the first direction and the second direction, a second wiring structure on the first semiconductor chip, the second wiring structure including an insulating layer and a first metal layer on the insulating layer, and a marking plate on the first metal layer, the marking plate including a first marking region and a second marking region different from the first marking region, wherein a shape of the first metal layer corresponding to the first marking region and a shape of the first metal layer corresponding to the second marking region are different from each other, and wherein a shape of an uneven structure in the first marking region and a shape of an uneven structure in the second marking region are different from each other.

公开(公告)号：US11177205B2

公开(公告)日：2021-11-16

申请号：US16454304

申请日：2019-06-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Park ,  Jong Youn Kim ,  Min Jun Bae

IPC: H01L23/49 ,  H01L23/31 ,  H01L23/36 ,  H01L23/538 ,  H01L23/498 ,  H01L23/367 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/42

Abstract: A semiconductor package includes a redistribution substrate having first and second surfaces opposed to each other, and including an insulation member, a plurality of redistribution layers on different levels in the insulation member, and a redistribution via having a shape narrowing from the second surface toward the first surface in a first direction; a plurality of UBM layers, each including a UBM pad on the first surface of the redistribution substrate, and a UBM via having a shape narrowing in a second direction, opposite to the first direction; and at least one semiconductor chip on the second surface of the redistribution substrate, and having a plurality of contact pads electrically connected to the redistribution layer adjacent to the second surface among the plurality of redistribution layers.

公开(公告)号：US12009277B2

公开(公告)日：2024-06-11

申请号：US17866866

申请日：2022-07-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Kyu Kim ,  Jung-Ho Park ,  Jong Youn Kim ,  Yeon Ho Jang ,  Jae Gwon Jang

IPC: H01L23/367 ,  H01L21/48 ,  H01L21/683 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L23/3675 ,  H01L21/4871 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/16225 ,  H01L2924/1431 ,  H01L2924/1434

Abstract: A semiconductor package includes a first semiconductor chip and a second semiconductor chip on a substrate, a barrier layer on the first semiconductor chip and the second semiconductor chip, the barrier layer having an opening through which at least a part of the first semiconductor chip is exposed, and a heat transfer part on the barrier layer, the heat transfer part extending along an upper face of the barrier layer and filling the opening.

公开(公告)号：US11967549B2

公开(公告)日：2024-04-23

申请号：US17509046

申请日：2021-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Ho Park ,  Jong Youn Kim ,  Min Jun Bae

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/42

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/42 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02371 ,  H01L2224/024 ,  H01L2224/08235

Abstract: A semiconductor package includes a redistribution substrate having first and second surfaces opposed to each other, and including an insulation member, a plurality of redistribution layers on different levels in the insulation member, and a redistribution via having a shape narrowing from the second surface toward the first surface in a first direction; a plurality of UBM layers, each including a UBM pad on the first surface of the redistribution substrate, and a UBM via having a shape narrowing in a second direction, opposite to the first direction; and at least one semiconductor chip on the second surface of the redistribution substrate, and having a plurality of contact pads electrically connected to the redistribution layer adjacent to the second surface among the plurality of redistribution layers.