公开(公告)号：US20230403839A1

公开(公告)日：2023-12-14

申请号：US18455980

申请日：2023-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Hun JUNG ,  Heon Jong SHIN ,  Min Chan GWAK ,  Sung Moon LEE ,  Jeong Ki HWANG

IPC: H10B10/00 ,  H01L23/528 ,  H01L21/768

CPC classification number: H10B10/12 ,  H01L23/528 ,  H01L21/76802 ,  H01L21/76883 ,  H10B10/125

Abstract: A semiconductor device comprises a first gate structure extending in a first direction and including a first gate electrode and a first gate capping pattern, a second gate structure spaced apart from the first gate structure and extending in the first direction, and including a second gate electrode and a second gate capping pattern, an active pattern extending in a second direction, the active pattern below the second gate structure, an epitaxial pattern on one side of the second gate structure and on the active pattern, a gate contact connected to the first gate electrode, and a node contact connected to the second gate electrode and to the epitaxial pattern. An upper surface of the gate contact is at a same level as the first gate capping pattern, and an upper surface of the node contact is lower than the upper surface of the first gate capping pattern.

公开(公告)号：US20250126882A1

公开(公告)日：2025-04-17

申请号：US18991796

申请日：2024-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H10D84/83 ,  H01L21/762 ,  H10D30/69 ,  H10D64/00

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20230402382A1

公开(公告)日：2023-12-14

申请号：US18113715

申请日：2023-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Kyu KIM ,  Yun Suk NAM ,  Kyoung Woo LEE ,  Ho-Jun KIM ,  Da Rong OH ,  Sung Moon LEE ,  Hag Ju CHO ,  Seung Min CHA

IPC: H01L23/528 ,  H01L29/06 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L23/5286 ,  H01L29/0673 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696 ,  H01L29/66439 ,  H01L29/42392

Abstract: A semiconductor device includes: a base substrate; a first interlayer insulating layer disposed on the base substrate; a power rail disposed inside the first interlayer insulating layer; an active pattern extended in a first horizontal direction and disposed on the first interlayer insulating layer; a gate electrode extended in a second horizontal direction different from the first horizontal direction and disposed on the active pattern; a gate cut extended in the first horizontal direction and disposed on the power rail, wherein the gate cut separates the gate electrode; and a power rail via disposed inside the gate cut, wherein the power rail via is overlapped by the power rail.

公开(公告)号：US20220020753A1

公开(公告)日：2022-01-20

申请号：US17185102

申请日：2021-02-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Hun JUNG ,  Heon Jong SHIN ,  Min Chan GWAK ,  Sung Moon LEE ,  Jeong Ki HWANG

IPC: H01L27/11 ,  H01L23/528 ,  H01L21/768

Abstract: A semiconductor device comprises a first gate structure extending in a first direction and including a first gate electrode and a first gate capping pattern, a second gate structure spaced apart from the first gate structure and extending in the first direction, and including a second gate electrode and a second gate capping pattern, an active pattern extending in a second direction, the active pattern below the second gate structure, an epitaxial pattern on one side of the second gate structure and on the active pattern, a gate contact connected to the first gate electrode, and a node contact connected to the second gate electrode and to the epitaxial pattern. An upper surface of the gate contact is at a same level as the first gate capping pattern, and an upper surface of the node contact is lower than the upper surface of the first gate capping pattern.

公开(公告)号：US20200043920A1

公开(公告)日：2020-02-06

申请号：US16382382

申请日：2019-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/762 ,  H01L29/40

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20230378174A1

公开(公告)日：2023-11-23

申请号：US18230052

申请日：2023-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L29/408 ,  H01L21/76224 ,  H01L29/7846

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20210366905A1

公开(公告)日：2021-11-25

申请号：US17393025

申请日：2021-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20210005603A1

公开(公告)日：2021-01-07

申请号：US17025497

申请日：2020-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20200043929A1

公开(公告)日：2020-02-06

申请号：US16368990

申请日：2019-03-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eui Chul HWANG ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Sang Min YOO ,  Joo Ho JUNG ,  Sung Moon LEE

IPC: H01L27/092 ,  H01L27/02 ,  H01L29/423 ,  H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/311 ,  H01L21/306 ,  H01L21/762

Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.