公开(公告)号：US12256593B2

公开(公告)日：2025-03-18

申请号：US18073870

申请日：2022-12-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Eoksu Kim ,  Kyoungseok Son ,  Junhyung Lim ,  Jihun Lim

IPC: H10K50/805 ,  G09G3/32 ,  G09G3/3233 ,  H10B10/00 ,  H10K50/30 ,  H10K59/12 ,  H10K59/121 ,  H10K71/00 ,  H10K77/10

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US20240040861A1

公开(公告)日：2024-02-01

申请号：US18378656

申请日：2023-10-11

Applicant: Samsung Display Co., Ltd.

Inventor： Jaybum Kim ,  Myeongho Kim ,  Yeonhong Kim ,  Kyoungseok Son ,  Seungjun Lee ,  Seunghun Lee ,  Junhyung Lim

IPC: H10K59/124 ,  H10K71/00 ,  H01L27/12 ,  H10K59/121

CPC classification number: H10K59/124 ,  H10K71/00 ,  H01L27/1225 ,  H10K59/1213 ,  H01L27/1251 ,  H10K59/1216 ,  H01L27/1255 ,  H01L25/18

Abstract: A display device is disclosed that includes: a substrate comprising a display area and a component area including a transmission area; a first thin-film transistor comprising a first semiconductor layer and a first gate electrode, the first semiconductor layer including a silicon semiconductor; a first insulating layer covering the first gate electrode; a second thin-film transistor comprising a second semiconductor layer arranged on the first insulating layer and a second gate electrode, the second semiconductor layer including an oxide semiconductor; a second insulating layer covering the second gate electrode and having a transmission hole overlapping the transmission area; an intermediate insulating layer between the first insulating layer and the second insulating layer; a conductive pattern between the intermediate insulating layer and the first insulating layer; and a display element arranged on the second insulating layer, wherein the transmission hole exposes an upper surface of the intermediate insulating layer.

公开(公告)号：US10892308B2

公开(公告)日：2021-01-12

申请号：US16789107

申请日：2020-02-12

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Masataka Kano

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52 ,  H01L51/00 ,  H01L27/12 ,  H01L51/50

Abstract: A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

公开(公告)号：US10367012B2

公开(公告)日：2019-07-30

申请号：US15657508

申请日：2017-07-24

Applicant: Samsung Display Co., Ltd.

Inventor： Jihun Lim ,  Jaybum Kim ,  Joonseok Park ,  Kyoungseok Son ,  Junhyung Lim

IPC: H01L29/49 ,  H01L29/788 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/66

Abstract: A transistor includes a semiconductor layer comprising a channel portion, a first contact portion and a second contact portion, a gate electrode facing the floating gate, and a floating gate disposed between the semiconductor layer and the gate electrode, the floating gate being insulated from the semiconductor layer and the gate electrode. The floating gate comprises an oxide semiconductor.

公开(公告)号：US12262593B2

公开(公告)日：2025-03-25

申请号：US18412760

申请日：2024-01-15

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Masataka Kano

IPC: H01L21/78 ,  H01L27/12 ,  H10K50/11 ,  H10K50/844 ,  H10K59/121 ,  H10K59/122 ,  H10K59/123 ,  H10K59/124 ,  H10K59/131 ,  H10K71/00 ,  H10K77/10 ,  H10K59/12 ,  H10K102/00

Abstract: A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

公开(公告)号：US20240224619A1

公开(公告)日：2024-07-04

申请号：US18506623

申请日：2023-11-10

Applicant: Samsung Display Co., LTD.

Inventor： Myeongho Kim ,  Youngoo Kim ,  Jaybum Kim ,  Kyoungseok Son ,  Seunghun Lee

IPC: H10K59/123 ,  H10K59/12 ,  H10K59/131

CPC classification number: H10K59/123 ,  H10K59/1201 ,  H10K59/131 ,  H10K2102/311

Abstract: A display apparatus includes a substrate having a display area in which display elements are arranged, a first thin-film transistor in the display area and including a first semiconductor layer and a first gate electrode, the first semiconductor layer including an oxide semiconductor and the first gate electrode being insulated from the first semiconductor layer, and a first interlayer insulating layer between the first semiconductor layer and the first gate electrode, wherein the first interlayer insulating layer on the first semiconductor layer has a first length in a first direction, wherein the first gate electrode on the first interlayer insulating layer has a second length in the first direction, and wherein the first length is greater than the second length.

公开(公告)号：US11751434B2

公开(公告)日：2023-09-05

申请号：US17453522

申请日：2021-11-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyoungseok Son ,  Dohyun Kwon ,  Jonghan Jeong ,  Jonghyun Choi ,  Eoksu Kim ,  Jaybum Kim ,  Junhyung Lim ,  Jihun Lim

IPC: H10K59/121 ,  G09G3/3225 ,  H10K59/124 ,  G09G3/3233 ,  H10K59/126 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12 ,  H01L29/786

CPC classification number: H10K59/1213 ,  G09G3/3225 ,  G09G3/3233 ,  H10K59/124 ,  H10K59/1216 ,  G09G3/3266 ,  G09G3/3275 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2310/08 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1255 ,  H01L29/7869 ,  H01L29/78633 ,  H01L29/78675 ,  H10K59/126

Abstract: A semiconductor device includes a base substrate, a first transistor disposed on the base substrate, the first transistor including a first input electrode, a first output electrode, a first control electrode, and a first semiconductor pattern including a crystalline semiconductor, a second transistor disposed on the base substrate, the second transistor including a second input electrode, a second output electrode, a second control electrode, and a second semiconductor pattern including an oxide semiconductor, a plurality of insulating layers disposed on the base substrate, and an upper electrode disposed on the first control electrode with at least one insulating layer of the plurality of insulating layers interposed between the upper electrode and the first control electrode. The upper electrode overlaps the first control electrode and forms a capacitor with the first control electrode.

公开(公告)号：US20220059634A1

公开(公告)日：2022-02-24

申请号：US17453522

申请日：2021-11-04

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Dohyun Kwon ,  Jonghan Jeong ,  Jonghyun Choi ,  Eoksu Kim ,  Jaybum Kim ,  Junhyung Lim ,  Jihn Lim

IPC: H01L27/32 ,  G09G3/3225 ,  G09G3/3233

Abstract: A semiconductor device includes a base substrate, a first transistor disposed on the base substrate, the first transistor including a first input electrode, a first output electrode, a first control electrode, and a first semiconductor pattern including a crystalline semiconductor, a second transistor disposed on the base substrate, the second transistor including a second input electrode, a second output electrode, a second control electrode, and a second semiconductor pattern including an oxide semiconductor, a plurality of insulating layers disposed on the base substrate, and an upper electrode disposed on the first control electrode with at least one insulating layer of the plurality of insulating layers interposed between the upper electrode and the first control electrode. The upper electrode overlaps the first control electrode and forms a capacitor with the first control electrode.

公开(公告)号：US10658399B2

公开(公告)日：2020-05-19

申请号：US16515153

申请日：2019-07-18

Applicant: Samsung Display Co., Ltd.

Inventor： Jihun Lim ,  Jaybum Kim ,  Joonseok Park ,  Kyoungseok Son ,  Junhyung Lim

IPC: H01L29/49 ,  H01L29/788 ,  H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/66

Abstract: A transistor includes a semiconductor layer comprising a channel portion, a first contact portion and a second contact portion, a gate electrode facing the floating gate, and a floating gate disposed between the semiconductor layer and the gate electrode, the floating gate being insulated from the semiconductor layer and the gate electrode. The floating gate comprises an oxide semiconductor.

公开(公告)号：US10340472B2

公开(公告)日：2019-07-02

申请号：US15657369

申请日：2017-07-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Eoksu Kim ,  Kyoungseok Son ,  Junhyung Lim ,  Jihun Lim

IPC: G09G3/32 ,  H01L27/11 ,  H01L27/32 ,  H01L51/00 ,  H01L51/52 ,  G09G3/3233

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.