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公开(公告)号:US10962581B2
公开(公告)日:2021-03-30
申请号:US16575805
申请日:2019-09-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji Nyeong Yun , Jae Moo Choi , Jong Pill Park , Jae Hong Kim
IPC: G01R31/01 , G01R31/28 , G01R1/073 , G01R31/319
Abstract: A semiconductor integrated circuit test system can include a first semiconductor integrated circuit tester configured to conduct a first test of a first characteristic of one of a plurality of semiconductor integrated circuits, wherein the first test is completed by the first semiconductor integrated circuit tester within a first test time. A second semiconductor integrated circuit tester, can be coupled to the first semiconductor integrated circuit tester, where the second semiconductor integrated circuit tester can be configured to conduct a second test of a second characteristic of each of the plurality of the semiconductor integrated circuits simultaneously, wherein the second test is completed within a second test time that is at least about two orders of magnitude more than the first test time.
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公开(公告)号:US12027541B2
公开(公告)日:2024-07-02
申请号:US17502499
申请日:2021-10-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae Hong Kim , Dae Hwa Paik , Seung Hyun Lim , Sin Hwan Lim
IPC: H01L27/146 , H04N25/75 , H04N25/767 , H04N25/778 , H04N25/78
CPC classification number: H01L27/14609 , H01L27/14603 , H04N25/75 , H04N25/767 , H04N25/778 , H04N25/78
Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.
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公开(公告)号:US11604220B2
公开(公告)日:2023-03-14
申请号:US17517057
申请日:2021-11-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyung Il Kim , Se-Hyun Seo , Byeong Min Yu , Jae Hong Kim , Sang Jae Rhee , Young Chyel Lee
Abstract: A test apparatus includes a first module configured to structurally support a target semiconductor device, and a second module reversibly attachable to the first module. The first module includes a first housing including one or more inner surfaces at least partially defining an inner space, a volume control unit configured to control a volume of the inner space, a mounting unit at least partially exposed to the inner space and configured to be exposed to the target semiconductor device, and a magnetic force control unit in the first housing. The second module includes a second housing, a test board in the second housing, and an attachable/detachable member in the second housing. The test board may be electrically connected to the target semiconductor device. The magnetic force control unit may control a magnetic property of the attachable/detachable member to cause the attachable/detachable member to attach/detach to/from the magnetic force control unit.
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公开(公告)号:US10972693B2
公开(公告)日:2021-04-06
申请号:US16727571
申请日:2019-12-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Hong Kim , Seung Hyun Lim , Han Kook Cho , Dong Hun Lee , Seog Heon Ham
IPC: H04N5/374 , H04N5/3745 , H04N5/365 , H04N5/378
Abstract: An image sensor and an image processing system including the same are provided. The image sensor includes a pixel array including a plurality of pixels each connected to one of first through m-th column lines to output a pixel signal, where “m” is an integer of at least 2; analog-to-digital converters each configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal; and a blocking circuit connected to an input terminal of at least one of the analog-to-digital converters to block an influence of an operation of others among the analog-to-digital converters.
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5.
公开(公告)号:US11349516B2
公开(公告)日:2022-05-31
申请号:US16961114
申请日:2018-11-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dae Soo Park , Jae Hong Kim , Jang Hoon Lee
IPC: H04B1/38 , H04B1/3818 , G06F11/07
Abstract: Various embodiments of the present invention relate to a method for accurately detecting, by an electronic device, that a tray for loading a SIM card is detached. An electronic device according to various embodiments of the present invention may comprise: a tray for loading a SIM card; a first processor electrically connected to the tray; and a second processor electrically connected to the first processor, wherein the first processor is configured to transfer a pre-event to the second processor when a detachment event for the tray is detected, and the second processor is configured to identify, in each designated period, whether the SIM card is erroneous; and delay identification of whether the SIM card is erroneous, in response to reception of the pre-event. The present invention may further include various other embodiments.
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公开(公告)号:US10444270B2
公开(公告)日:2019-10-15
申请号:US15455818
申请日:2017-03-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ji Nyeong Yun , Jae Moo Choi , Jong Pill Park , Jae Hong Kim
IPC: G01R31/01 , G01R31/28 , G01R1/073 , G01R31/319
Abstract: A semiconductor integrated circuit test system can include a first semiconductor integrated circuit tester configured to conduct a first test of a first characteristic of one of a plurality of semiconductor integrated circuits, wherein the first test is completed by the first semiconductor integrated circuit tester within a first test time. A second semiconductor integrated circuit tester, can be coupled to the first semiconductor integrated circuit tester, where the second semiconductor integrated circuit tester can be configured to conduct a second test of a second characteristic of each of the plurality of the semiconductor integrated circuits simultaneously, wherein the second test is completed within a second test time that is at least about two orders of magnitude more than the first test time.
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7.
公开(公告)号:US09800843B2
公开(公告)日:2017-10-24
申请号:US14973700
申请日:2015-12-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung Hyun Lim , Jae Hong Kim , Han Kook Cho , Dong Hun Lee , Jin Uk Jeon , Seog Heon Ham
CPC classification number: H04N9/045 , H04N5/3456 , H04N5/3651 , H04N5/378
Abstract: An image sensor for reducing channel variation and an image processing system including the same. The image sensor includes first to mth pixels (m≧2), each of which is connected to a corresponding column line from among first to mth column lines and is configured to output a respective pixel signal.’ The image sensor further includes first to mth bias circuits, each of which is connected to a corresponding column line from among the first to mth column lines and is configured to fix a voltage of the corresponding column line to a bias voltage when a column line-specific pixel is not selected to output the respective pixel signal. An analog-to-digital converter in the image sensor is configured to convert the pixel signals into digital signals.
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公开(公告)号:US12199115B2
公开(公告)日:2025-01-14
申请号:US18599687
申请日:2024-03-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae Hong Kim , Dae Hwa Paik , Seung Hyun Lim , Sin Hwan Lim
IPC: H01L27/146 , H04N25/75 , H04N25/767 , H04N25/778 , H04N25/78
Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.
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公开(公告)号:US10084982B2
公开(公告)日:2018-09-25
申请号:US15087043
申请日:2016-03-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Hong Kim , Seung Hyun Lim , Han Kook Cho , Dong Hun Lee , Seog Heon Ham
IPC: H04N5/374 , H04N5/3745 , H04N5/365 , H04N5/378
CPC classification number: H04N5/37455 , H04N5/3658 , H04N5/374 , H04N5/378
Abstract: An image sensor and an image processing system including the same are provided. The image sensor includes a pixel array including a plurality of pixels each connected to one of first through m-th column lines to output a pixel signal, where “m” is an integer of at least 2; analog-to-digital converters each configured to receive the pixel signal corresponding to one of the first through m-th column lines, to compare the pixel signal with a ramp signal, and to convert the pixel signal to a digital pixel signal; and a blocking circuit connected to an input terminal of at least one of the analog-to-digital converters to block an influence of an operation of others among the analog-to-digital converters.
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公开(公告)号:US11152407B2
公开(公告)日:2021-10-19
申请号:US16354593
申请日:2019-03-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae Hong Kim , Dae Hwa Paik , Seung Hyun Lim , Sin Hwan Lim
IPC: H01L27/146 , H04N5/378
Abstract: An image sensor includes a first column line and a second column line configured to extend in a first direction, a plurality of pixel groups configured to connect to the first column line or the second column line and to comprise a plurality of pixels in each of the plurality of pixel groups, a bias circuit configured to comprise a first current circuit and a second current circuit configured to output different bias currents in a first operational mode, and a switching circuit configured to connect the first column line to the first current circuit and connect the second column line to the second current circuit during a first time period, and to connect the first column line to the second current circuit and connect the second column line to the first current circuit during a second time period subsequent to the first time period in the first operational mode.
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