SEMICONDUCTOR PACKAGE AND METHOD OF INSPECTING THE SEMICONDUCTOR PACKAGE

    公开(公告)号:US20240395747A1

    公开(公告)日:2024-11-28

    申请号:US18638757

    申请日:2024-04-18

    Abstract: A semiconductor package may include a semiconductor chip having a first surface and a second surface opposite to the first surface and having a plurality of circuit patterns provided in the second surface, a redistribution wiring layer on the second surface of the semiconductor chip and having a plurality of redistribution wirings and a plurality of bonding pads, the redistribution wirings being electrically connected to the circuit patterns, the bonding pads electrically connected to the redistribution wirings and exposed from a lower surface, a plurality of conductive bumps on the plurality of bonding pads, respectively, and a plurality of spacers on the lower surface of the redistribution wiring layer and configured to align the plurality of conductive bumps through respective through holes of a test socket and to space the redistribution wiring layer from the test socket.

    Semiconductor device and semiconductor package having the same

    公开(公告)号:US11670568B2

    公开(公告)日:2023-06-06

    申请号:US17029334

    申请日:2020-09-23

    CPC classification number: H01L23/3735 H01L23/053 H01L23/3128 H01L23/49822

    Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

    SOCKET FOR TESTING SEMICONDUCTOR DEVICE
    3.
    发明公开

    公开(公告)号:US20240142493A1

    公开(公告)日:2024-05-02

    申请号:US18497401

    申请日:2023-10-30

    Abstract: A socket for testing a semiconductor package includes a body having an internal space configured to accommodate a semiconductor package; and at least a first spacer on the body and positioned to contact a first surface of the semiconductor package when the semiconductor package is placed on the body. The body includes a lower socket portion provided with through-holes, configured through which to receive meter reading pins that contact external connection terminals of the semiconductor package, and an upper socket portion disposed above the lower socket portion, and the first spacer is disposed on a surface of the lower socket portion that faces the first surface of the semiconductor package when the semiconductor package is placed on the body.

    FAN-OUT SEMICONDUCTOR PACKAGE
    5.
    发明申请

    公开(公告)号:US20210375757A1

    公开(公告)日:2021-12-02

    申请号:US17403233

    申请日:2021-08-16

    Abstract: A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed.

    Fan-out semiconductor package
    6.
    发明授权

    公开(公告)号:US11121079B2

    公开(公告)日:2021-09-14

    申请号:US16588269

    申请日:2019-09-30

    Abstract: A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed.

    FAN-OUT SEMICONDUCTOR PACKAGE
    7.
    发明申请

    公开(公告)号:US20200161237A1

    公开(公告)日:2020-05-21

    申请号:US16588269

    申请日:2019-09-30

    Abstract: A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed.

    Semiconductor device and semiconductor package having the same

    公开(公告)号:US12154840B2

    公开(公告)日:2024-11-26

    申请号:US18310284

    申请日:2023-05-01

    Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

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