公开(公告)号：US10811357B2

公开(公告)日：2020-10-20

申请号：US15946075

申请日：2018-04-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Boong Lee ,  Jung-Ho Do ,  Tae-Joong Song ,  Seung-Young Lee ,  Jong-Hoon Jung ,  Ji-Su Yu

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/522 ,  H01L21/8234 ,  H01L27/118 ,  G06F30/327 ,  G06F30/394 ,  H01L27/088 ,  H01L27/092 ,  G06F30/392

Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.

公开(公告)号：US10445455B2

公开(公告)日：2019-10-15

申请号：US15689008

申请日：2017-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Ho Do ,  Jong-Hoon Jung ,  Seung-Young Lee ,  Tae-Joong Song

IPC: G06F17/50 ,  G03F1/70 ,  G03F7/20

Abstract: An integrated circuit includes: a lower layer including first and second lower patterns extending in a first direction; a first via arranged on the first lower pattern, and a second via arranged on the second lower pattern; a first upper pattern arranged on the first via; and a second upper pattern arranged on the second via, a first color is assigned to the first upper pattern, a second color is assigned to the second upper pattern, the first and second upper patterns are adjacent to each other in a second direction, and the first via is arranged in a first edge region of the first lower pattern, the first edge region being farther away from the second lower pattern than a second edge region of the first lower pattern, the second edge region being opposite to the first edge region.

公开(公告)号：US09825024B2

公开(公告)日：2017-11-21

申请号：US14870141

申请日：2015-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hoon Jung

IPC: H01L27/02 ,  H01L27/11 ,  H01L29/78 ,  H01L23/528 ,  H01L27/108

CPC classification number: H01L27/0292 ,  H01L23/528 ,  H01L23/5286 ,  H01L27/10897 ,  H01L27/1116 ,  H01L28/00 ,  H01L29/78

Abstract: A semiconductor device is provided. The semiconductor device includes an active region, a gate line, a first metal interconnect, a power rail, and a second metal interconnect. The gate line overlaps the active region and extends along a first direction. The first metal interconnect overlaps the active region and the gate line. The first metal interconnect extends along a second direction intersecting the first direction. The power rail is disposed in a higher layer than the first metal interconnect. The power rail extends along the second direction. The second metal interconnect is disposed in a same layer as the power rail, the second metal interconnect extends along the second direction.

公开(公告)号：US20170098641A1

公开(公告)日：2017-04-06

申请号：US14874989

申请日：2015-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hoon Jung

IPC: H01L27/02 ,  H01L29/06 ,  H01L27/088 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L27/0207 ,  H01L21/823437 ,  H01L21/823475 ,  H01L23/5221 ,  H01L23/5226 ,  H01L23/528 ,  H01L27/088 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/78

Abstract: According to an exemplary embodiment of the present inventive concept, a semiconductor device is provided as follows. An active region is disposed in one side of a gate line. A non-active region is disposed in the other side of the gate line. A jumper pattern crosses a top portion of the gate line, overlapping the active region and the non-active region. A boundary between the active region and the non-active region is underneath the gate line.

公开(公告)号：US10832988B2

公开(公告)日：2020-11-10

申请号：US16394961

申请日：2019-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Ho Do ,  Tae-Joong Song ,  Seung-Young Lee ,  Jong-Hoon Jung

IPC: H01L23/48 ,  H01L23/482 ,  H01L27/02 ,  H01L27/118 ,  H01L23/485 ,  H01L21/768 ,  G06F30/394 ,  G06F30/392

Abstract: An integrated circuit includes first and second active regions extending in a first direction, a first gate line extending in a second direction substantially perpendicular to the first direction and crossing the first and second active regions, and a first contact jumper including a first conductive pattern intersecting the first gate line above the first active region and a second conductive pattern extending in the second direction above the first gate line and connected to the first conductive pattern.

公开(公告)号：US09865544B2

公开(公告)日：2018-01-09

申请号：US14874916

申请日：2015-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Hoon Jung

IPC: H01L23/50 ,  H01L23/528 ,  H01L23/522 ,  H01L27/02 ,  H01L29/417

CPC classification number: H01L23/5286 ,  H01L23/50 ,  H01L23/5226 ,  H01L27/0207 ,  H01L27/11582 ,  H01L28/00 ,  H01L29/41758

Abstract: A semiconductor device is provided as follows. An active region extends along a first direction. A gate line overlaps the active region and extending along a second direction intersecting the first direction. A power rail has a main pattern extending along the first direction and a sub-pattern branching off from the main pattern to extend along the second direction. A first source/drain contact, electrically connected to the power rail, overlaps the active region and the sub-pattern.

公开(公告)号：US12125787B2

公开(公告)日：2024-10-22

申请号：US17037569

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Boong Lee ,  Jung-Ho Do ,  Tae-Joong Song ,  Seung-Young Lee ,  Jong-Hoon Jung ,  Ji-Su Yu

IPC: H01L23/528 ,  G06F30/327 ,  G06F30/392 ,  G06F30/394 ,  H01L21/8234 ,  H01L23/522 ,  H01L27/02 ,  H01L27/088 ,  H01L27/092 ,  H01L27/118 ,  G06F115/02

CPC classification number: H01L23/5286 ,  G06F30/327 ,  G06F30/392 ,  G06F30/394 ,  H01L21/823475 ,  H01L23/5226 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/11807 ,  G06F2115/02 ,  H01L27/088 ,  H01L27/092 ,  H01L2027/11881

Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.

公开(公告)号：US11335673B2

公开(公告)日：2022-05-17

申请号：US16191720

申请日：2018-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Ho Do ,  Dal-Hee Lee ,  Jin-Young Lim ,  Tae-Joong Song ,  Jong-Hoon Jung

IPC: H01L27/02 ,  H01L27/118 ,  G11C5/06 ,  G06F30/00 ,  G11C8/16 ,  G11C11/412 ,  H01L21/768 ,  H01L27/088

Abstract: An integrated circuit may include a first active region and a second active region, and the first and second active regions may extend on a substrate in a first horizontal direction in parallel to each other and have different conductivity types from each other. A first gate line may extend in a second horizontal direction crossing the first horizontal direction, and may form a first transistor with the first active region. The first transistor may include a gate to which a first input signal is applied. The first gate line may include a first partial gate line that overlaps the first active region in a perpendicular direction and that has an end on a region between the first and second active regions.

公开(公告)号：US20200034508A1

公开(公告)日：2020-01-30

申请号：US16589360

申请日：2019-10-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Ho Do ,  Jong-Hoon Jung ,  Seung-Young Lee ,  Tae-Joong Song

IPC: G06F17/50 ,  G03F7/20 ,  G03F1/70

Abstract: An integrated circuit includes: a lower layer including first and second lower patterns extending in a first direction; a first via arranged on the first lower pattern, and a second via arranged on the second lower pattern; a first upper pattern arranged on the first via; and a second upper pattern arranged on the second via, a first color is assigned to the first upper pattern, a second color is assigned to the second upper pattern, the first and second upper patterns are adjacent to each other in a second direction, and the first via is arranged in a first edge region of the first lower pattern, the first edge region being farther away from the second lower pattern than a second edge region of the first lower pattern, the second edge region being opposite to the first edge region.

公开(公告)号：US20190355750A1

公开(公告)日：2019-11-21

申请号：US16409129

申请日：2019-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-ho Do ,  Ji-Su Yu ,  Hyeon-gyu You ,  Seung-Young Lee ,  Jae-Boong Lee ,  Jong-Hoon Jung

IPC: H01L27/118 ,  H01L27/02

Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.