公开(公告)号：US12272652B2

公开(公告)日：2025-04-08

申请号：US18140985

申请日：2023-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiwon Shin ,  Donguk Kwon ,  Kwang Bok Woo ,  Minseung Ji

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/367 ,  H01L25/065

Abstract: A semiconductor package includes a first sub-semiconductor device, an interposer, and a second sub-semiconductor device stacked on each other, and a heat sink covering the second sub-semiconductor device. The first sub-semiconductor device includes a first substrate and a first semiconductor chip. The interposer includes a dielectric layer, a thermal conductive layer in contact with a bottom surface of the dielectric layer, a first thermal conductive pad in contact with a top surface of the dielectric layer, and thermal conductive vias penetrating the dielectric layer to connect the thermal conductive layer to the first thermal conductive pad. A bottom surface of the thermal conductive layer is adjacent to and connected to a top surface of the first semiconductor chip. The second sub-semiconductor device is disposed on the dielectric layer without overlapping the first thermal conductive pad. The heat sink further covers the first thermal conductive pad to be connected thereto.

公开(公告)号：US11676904B2

公开(公告)日：2023-06-13

申请号：US17328297

申请日：2021-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiwon Shin ,  Donguk Kwon ,  Kwang Bok Woo ,  Minseung Ji

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/367

CPC classification number: H01L23/5385 ,  H01L23/367 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48147 ,  H01L2224/73204 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06506 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2924/15156 ,  H01L2924/15311 ,  H01L2924/3511

Abstract: A semiconductor package includes a first sub-semiconductor device, an interposer, and a second sub-semiconductor device stacked on each other, and a heat sink covering the second sub-semiconductor device. The first sub-semiconductor device includes a first substrate and a first semiconductor chip. The interposer includes a dielectric layer, a thermal conductive layer in contact with a bottom surface of the dielectric layer, a first thermal conductive pad in contact with a top surface of the dielectric layer, and thermal conductive vias penetrating the dielectric layer to connect the thermal conductive layer to the first thermal conductive pad. A bottom surface of the thermal conductive layer is adjacent to and connected to a top surface of the first semiconductor chip. The second sub-semiconductor device is disposed on the dielectric layer without overlapping the first thermal conductive pad. The heat sink further covers the first thermal conductive pad to be connected thereto.

公开(公告)号：US10008642B2

公开(公告)日：2018-06-26

申请号：US15364739

申请日：2016-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Wan Seo ,  Jin Ha Kim ,  Kwang Bok Woo ,  Dong Hoon Lee ,  Won Joon Lee ,  Sun Hwan Hwang

IPC: H01L33/50 ,  H01L33/38 ,  H01L33/46 ,  H01L33/62

CPC classification number: H01L33/504 ,  H01L33/38 ,  H01L33/46 ,  H01L33/50 ,  H01L33/502 ,  H01L33/508 ,  H01L33/56 ,  H01L33/62

Abstract: A semiconductor light emitting device may include a semiconductor light emitting diode (LED) chip, a light-transmitting film on the LED chip, and a light-transmitting bonding layer between the light-transmitting film and the semiconductor LED chip. At least one of the light-transmitting film and the light-transmitting bonding layer may include a wavelength conversion material configured to convert light emitted by the semiconductor LED chip into light having a wavelength different from a wavelength of the emitted light. The light-transmitting bonding layer may have a lateral inclined region extending to the lateral surface to form an inclined surface. The semiconductor light emitting device may further include a reflective packaging portion surrounding the light-transmitting bonding layer, covering the first surface such that an electrode of the LED chip is at least partially exposed. The reflective packaging portion may include a reflective material.