IMAGE SENSOR CHIPS
    6.
    发明申请
    IMAGE SENSOR CHIPS 有权
    图像传感器

    公开(公告)号:US20140104473A1

    公开(公告)日:2014-04-17

    申请号:US14051993

    申请日:2013-10-11

    CPC classification number: H04N5/374 H01L27/14627 H01L27/14634

    Abstract: An image sensor chip includes a first wafer and a second wafer. The first wafer includes an image sensor having a plurality of sub-pixels, each of which is configured to detect at least one photon and output a sub-pixel signal according to a result of the detection. The image processor is configured to process sub-pixel signals for each sub-pixel and generate image data. The first wafer and the second wafer are formed in a wafer stack structure.

    Abstract translation: 图像传感器芯片包括第一晶片和第二晶片。 第一晶片包括具有多个子像素的图像传感器,每个子像素被配置为检测至少一个光子并根据检测结果输出子像素信号。 图像处理器被配置为处理每个子像素的子像素信号并生成图像数据。 第一晶片和第二晶片形成为晶片堆叠结构。

    IMAGE SENSOR AND METHOD OF OPERATING THE SAME
    7.
    发明申请
    IMAGE SENSOR AND METHOD OF OPERATING THE SAME 审中-公开
    图像传感器及其操作方法

    公开(公告)号:US20150049230A1

    公开(公告)日:2015-02-19

    申请号:US14451983

    申请日:2014-08-05

    Abstract: A method of operating an image sensor includes generating a plurality of sub pixel signals using a sub pixel group. The sub pixel group includes a plurality of sub pixels and corresponds to a single pixel. The method further includes generating a pixel signal having a plurality of bits based on a result of comparing the sub pixel signals with a reference voltage. Each of the sub pixels is a 1-transistor (1T) pixel that detects at least one photogenerated charge and includes only one transistor.

    Abstract translation: 操作图像传感器的方法包括使用子像素组生成多个子像素信号。 子像素组包括多个子像素并且对应于单个像素。 该方法还包括基于将子像素信号与参考电压进行比较的结果来生成具有多个位的像素信号。 每个子像素是检测至少一个光生电荷并且仅包括一个晶体管的1-晶体管(1T)像素。

    CORRELATED DOUBLE SAMPLING CIRCUIT, METHOD THEREOF AND DEVICES HAVING THE SAME
    8.
    发明申请
    CORRELATED DOUBLE SAMPLING CIRCUIT, METHOD THEREOF AND DEVICES HAVING THE SAME 审中-公开
    相关的双重采样电路及其方法及其设备

    公开(公告)号:US20140333813A1

    公开(公告)日:2014-11-13

    申请号:US14276687

    申请日:2014-05-13

    CPC classification number: H04N5/3745 G01J1/46 H04N5/335 H04N5/357 H04N5/378

    Abstract: A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.

    Abstract translation: CDS电路包括第一电容器; 第二电容器; 以及开关装置,其响应于开关控制信号将第一电容器串联连接在像素信号输出节点和地之间以压缩像素信号,并将第二电容器串联连接在斜坡信号输出节点和地之间 压缩斜坡信号,或者将像素信号输出节点和比较器的第一输入节点并联的第一电容器连接在斜坡信号输出节点和比较器的第二输入节点之间并联连接第二电容器。

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