Abstract:
An iris-based authentication method is provided. The method includes emitting light of an infrared wavelength band and obtaining an image based on the light of the infrared wavelength band, determining whether a specified condition is satisfied, if the specified condition is satisfied, performing user authentication (e.g., complex authentication) based on at least part of a face image and an iris image of the image that a biometric sensor obtains, or, if the specified condition is not satisfied, performing the user authentication (e.g., iris-only authentication) based on the iris image in the image that the biometric sensor obtains.
Abstract:
A correlated double sampling (CDS) circuit includes a comparator and a first circuit. The comparator including, a first input terminal, a second input terminal, at least one output terminal, and a plurality of first transistors operably coupled between the at least one output terminal and the first and second input terminals. The first circuit includes at least one second transistor, the at least one second transistor operably coupled to the at least one output terminal and one of the first input terminal and the second input terminal, the at least one second transistor having at least one of (i) a different number of layers than the first transistors, and (ii) a different dimension than the first transistors.
Abstract:
An RGBW image sensor, a binning method in an image sensor, and a computer readable medium for performing the method are provided, and the binning method in an image sensor includes selecting one or more binning target pixels for each of a red pixel, a green pixel, a blue pixel, and a white pixel, constituting a pixel array of an RGBW image sensor with a uniform array pattern, generating binning pixel data for each of the red pixel, the green pixel, the blue pixel, and the white pixel, based on pieces of pixel data corresponding to the binning target pixel, and rearranging pixels, represented by the binning pixel data, to be equal to the entirety or a portion of the uniform array pattern and to be equally spaced apart from each other.
Abstract:
An electronic device is provided. The electronic device includes an iris recognizing unit that extracts an iris area from one frame of a preview image and performs iris authentication by comparing a feature of the iris area with registered iris information and a processor that determines a match, a no-match, or an iris recognition error based on one of an amount of times that the iris authentication is performed during a first time period and a result of the iris authentication during the first critical time period.
Abstract:
An image sensor according to an example embodiment concepts includes a pixel array including pixels, and each of the pixels includes photoelectric conversion elements. The photoelectric conversion elements independently operating to detect a phase difference. The image sensor further includes a control circuit configured to independently control exposure times of each of the photoelectric conversion elements included in each of the pixels.
Abstract:
An image sensor chip includes a first wafer and a second wafer. The first wafer includes an image sensor having a plurality of sub-pixels, each of which is configured to detect at least one photon and output a sub-pixel signal according to a result of the detection. The image processor is configured to process sub-pixel signals for each sub-pixel and generate image data. The first wafer and the second wafer are formed in a wafer stack structure.
Abstract:
A method of operating an image sensor includes generating a plurality of sub pixel signals using a sub pixel group. The sub pixel group includes a plurality of sub pixels and corresponds to a single pixel. The method further includes generating a pixel signal having a plurality of bits based on a result of comparing the sub pixel signals with a reference voltage. Each of the sub pixels is a 1-transistor (1T) pixel that detects at least one photogenerated charge and includes only one transistor.
Abstract:
A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.
Abstract:
A sub pixel includes a photodetector and a column line output circuit. The photodetector is configured to output an electrical signal based on a detected amount of photons. The column line output circuit is configured to generate an output signal based on the electrical signal. The output signal is one of a current from a current source and a comparison signal indicative of binary output data.