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公开(公告)号:US20130260551A1
公开(公告)日:2013-10-03
申请号:US13903164
申请日:2013-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Un-Byoung Kang , Kwang-chul Choi , Jung-Hwan Kim , Tae Hong Min , Hojin Lee , Minseung Yoon
IPC: H01L21/48
CPC classification number: H01L21/4835 , H01L21/6836 , H01L21/76898 , H01L23/3114 , H01L23/3192 , H01L23/49827 , H01L24/06 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L27/14618 , H01L2221/68327 , H01L2221/6834 , H01L2224/02166 , H01L2224/02313 , H01L2224/02372 , H01L2224/02375 , H01L2224/02381 , H01L2224/024 , H01L2224/03462 , H01L2224/03466 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05022 , H01L2224/05026 , H01L2224/05147 , H01L2224/05548 , H01L2224/05567 , H01L2224/05571 , H01L2224/05647 , H01L2224/06131 , H01L2224/06135 , H01L2224/06138 , H01L2224/06181 , H01L2224/13007 , H01L2224/13022 , H01L2224/13024 , H01L2224/13025 , H01L2224/16147 , H01L2224/16225 , H01L2224/16227 , H01L2224/29011 , H01L2224/32225 , H01L2224/45139 , H01L2224/48105 , H01L2224/48227 , H01L2224/48228 , H01L2224/73253 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/014 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/05552 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern. Therefore, a semiconductor device with enhanced reliability may be implemented.
Abstract translation: 在半导体器件中,有机绝缘图案设置在第一和第二重新布线图案之间。 有机绝缘图案可以吸收当第一和第二重新布线图案在加热下膨胀时发生的物理应力。 由于有机绝缘图案设置在第一和第二重新布线图案之间,所以可以相对于其中在重新布线图案之间设置半导体图案的半导体器件来增加绝缘性能。 此外,由于在第一和第二重新布线图案和有机绝缘图案之间以及基板和有机绝缘图案之间设置种子层图案,所以第一和第二布线图案的粘合强度提高。 这也减少了分层问题。 此外,种子层图案防止形成重新布线图案的金属扩散到有机绝缘图案。 因此,可以实现具有增强的可靠性的半导体器件。
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公开(公告)号:US09196505B2
公开(公告)日:2015-11-24
申请号:US13903164
申请日:2013-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Un-Byoung Kang , Kwang-Chul Choi , Jung-Hwan Kim , Tae Hong Min , Hojin Lee , Minseung Yoon
IPC: H01L21/00 , H01L21/48 , H01L23/31 , H01L23/00 , H01L21/768 , H01L21/683 , H01L25/065 , H01L27/146 , H01L23/498
CPC classification number: H01L21/4835 , H01L21/6836 , H01L21/76898 , H01L23/3114 , H01L23/3192 , H01L23/49827 , H01L24/06 , H01L24/45 , H01L24/48 , H01L25/0657 , H01L27/14618 , H01L2221/68327 , H01L2221/6834 , H01L2224/02166 , H01L2224/02313 , H01L2224/02372 , H01L2224/02375 , H01L2224/02381 , H01L2224/024 , H01L2224/03462 , H01L2224/03466 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05008 , H01L2224/05022 , H01L2224/05026 , H01L2224/05147 , H01L2224/05548 , H01L2224/05567 , H01L2224/05571 , H01L2224/05647 , H01L2224/06131 , H01L2224/06135 , H01L2224/06138 , H01L2224/06181 , H01L2224/13007 , H01L2224/13022 , H01L2224/13024 , H01L2224/13025 , H01L2224/16147 , H01L2224/16225 , H01L2224/16227 , H01L2224/29011 , H01L2224/32225 , H01L2224/45139 , H01L2224/48105 , H01L2224/48227 , H01L2224/48228 , H01L2224/73253 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/014 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/05552 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern. Therefore, a semiconductor device with enhanced reliability may be implemented.
Abstract translation: 在半导体器件中,有机绝缘图案设置在第一和第二重新布线图案之间。 有机绝缘图案可以吸收当第一和第二重新布线图案在加热下膨胀时发生的物理应力。 由于有机绝缘图案设置在第一和第二重新布线图案之间,所以可以相对于其中在重新布线图案之间设置半导体图案的半导体器件来增加绝缘性能。 此外,由于在第一和第二重新布线图案和有机绝缘图案之间以及基板和有机绝缘图案之间设置种子层图案,所以第一和第二布线图案的粘合强度提高。 这也减少了分层问题。 此外,种子层图案防止形成重新布线图案的金属扩散到有机绝缘图案。 因此,可以实现具有增强的可靠性的半导体器件。
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公开(公告)号:US12142573B2
公开(公告)日:2024-11-12
申请号:US18244350
申请日:2023-09-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yukyung Park , Minseung Yoon , Yunseok Choi
IPC: H01L23/52 , H01L23/367 , H01L23/498 , H01L23/538
Abstract: An interposer includes a base layer including a first surface and a second surface that are opposite to each other. An interconnect structure is disposed on the first surface. The interconnect structure includes a metal interconnect pattern and an insulating layer surrounding the metal interconnect pattern. A first lower protection layer is disposed on the second surface. A plurality of lower conductive pads is disposed on the first lower protection layer. A plurality of through electrodes penetrates the base layer and the first lower protection layer. The plurality of through electrodes electrically connects the metal interconnect pattern of the interconnect structure to the lower conductive pads. At least one of the insulating layer and the first lower protection layer has compressive stress. A thickness of the first lower protection layer is in a range of about 13% to about 30% of a thickness of the insulating layer.
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公开(公告)号:US11784131B2
公开(公告)日:2023-10-10
申请号:US17163988
申请日:2021-02-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yukyung Park , Minseung Yoon , Yunseok Choi
IPC: H01L23/52 , H01L23/538 , H01L23/498 , H01L23/367
CPC classification number: H01L23/5386 , H01L23/3675 , H01L23/49822 , H01L23/49838 , H01L23/5383
Abstract: An interposer includes a base layer including a first surface and a second surface that are opposite to each other. An interconnect structure is disposed on the first surface. The interconnect structure includes a metal interconnect pattern and an insulating layer surrounding the metal interconnect pattern. A first lower protection layer is disposed on the second surface. A plurality of lower conductive pads is disposed on the first lower protection layer. A plurality of through electrodes penetrates the base layer and the first lower protection layer. The plurality of through electrodes electrically connects the metal interconnect pattern of the interconnect structure to the lower conductive pads. At least one of the insulating layer and the first lower protection layer has compressive stress. A thickness of the first lower protection layer is in a range of about 13% to about 30% of a thickness of the insulating layer.
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