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    MEMORY DEVICES AND METHODS OF OPERATING THE SAME
    1.
    发明申请
    MEMORY DEVICES AND METHODS OF OPERATING THE SAME 审中-公开

    公开(公告)号：US20190066773A1

    公开(公告)日：2019-02-28

    申请号：US15915660

    申请日：2018-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung-Hyun Park ,  In-Hak Lee ,  Jae-Seung Choi

    IPC: G11C11/419 ,  G11C11/408 ,  G11C11/4097 ,  G11C7/14 ,  H01L27/11

    Abstract: A memory device includes a memory cell, a word line connected to the memory cell, a bit line connected to the memory cell, a complementary bit line connected to the memory cell, an auxiliary bit line, an auxiliary complementary bit line, and a switch circuit. The memory cell stores a single bit. The switch circuit electrically connects one of the bit line and the complementary bit line to one of the auxiliary bit line and the auxiliary complementary bit line, in response to a logic level of a data bit to be written in the memory cell during a write operation, by using at least one or more transistors of at least one dummy cell as a switch, and the at least one dummy cell does not store a data bit.

    Memory devices and methods of operating the same
    3.
    发明授权
    Memory devices and methods of operating the same 有权

    公开(公告)号：US10319433B2

    公开(公告)日：2019-06-11

    申请号：US15915660

    申请日：2018-03-08

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung-Hyun Park ,  In-Hak Lee ,  Jae-Seung Choi

    IPC: G11C11/419 ,  G11C7/18 ,  G11C11/408 ,  H01L27/11 ,  G11C7/14 ,  G11C11/4097

    Abstract: A memory device includes a memory cell, a word line connected to the memory cell, a bit line connected to the memory cell, a complementary bit line connected to the memory cell, an auxiliary bit line, an auxiliary complementary bit line, and a switch circuit. The memory cell stores a single bit. The switch circuit electrically connects one of the bit line and the complementary bit line to one of the auxiliary bit line and the auxiliary complementary bit line, in response to a logic level of a data bit to be written in the memory cell during a write operation, by using at least one or more transistors of at least one dummy cell as a switch, and the at least one dummy cell does not store a data bit.

    Memory cell, memory device, and electronic device having the same
    4.
    发明授权
    Memory cell, memory device, and electronic device having the same 有权

    公开(公告)号：US09940998B2

    公开(公告)日：2018-04-10

    申请号：US15469037

    申请日：2017-03-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Hoon Jung ,  Sung-Hyun Park ,  Woo-Jin Rim

    IPC: G11C11/00 ,  G11C11/419 ,  G11C11/418

    CPC classification number: G11C11/419 ,  G11C7/12 ,  G11C11/418

    Abstract: A memory device includes a memory cell array including a plurality of memory cells, a plurality of word lines connected to the plurality of memory cells, a plurality of bit lines connected to the plurality of memory cells, a plurality of complementary bit lines connected to the plurality of memory cells, a plurality of auxiliary bit lines, a plurality of auxiliary complementary bit lines, and a switch circuit. The switch circuit electrically connects the plurality of auxiliary bit lines to the plurality of bit lines during a write operation, electrically connects the plurality of auxiliary complementary bit lines to the plurality of complementary bit lines during the write operation, electrically disconnects the plurality of auxiliary bit lines from the plurality of bit lines during a read operation, and electrically disconnects the plurality of auxiliary complementary bit lines from the plurality of complementary bit lines during the read operation.

    Sense amplifiers and memory devices having the same
    5.
    发明授权
    Sense amplifiers and memory devices having the same 有权
    感应放大器和具有相同功能的存储器件

    公开(公告)号：US09324384B2

    公开(公告)日：2016-04-26

    申请号：US14504596

    申请日：2014-10-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tae-Joong Song ,  Sung-Hyun Park ,  Woo-Jin Rim ,  Gi-Young Yang

    IPC: G11C7/08 ,  G11C7/06 ,  G11C7/12 ,  G11C11/419

    CPC classification number: G11C7/065 ,  G11C7/12 ,  G11C11/419

    Abstract: In a sense amplifier, a switching transistor is configured to apply a ground voltage to a ground node in response to a sense enable signal. A first detection circuit is configured to output a first detection signal to the first detection node based on a mode signal and a voltage of a bit-line. A second detection circuit is configured to output a second detection signal to the second detection node based on a voltage of a complementary bit-line. A latch circuit is connected to a supply voltage, the first detection node and the second detection node, and configured to output a first amplified signal and a second amplified signal through a latch node and a complementary latch node, respectively, based on the first detection signal and the second detection signal.

    Abstract translation: 在感测放大器中，开关晶体管被配置为响应于感测使能信号而将接地电压施加到接地节点。 第一检测电路被配置为基于位线的模式信号和电压将第一检测信号输出到第一检测节点。 第二检测电路被配置为基于互补位线的电压将第二检测信号输出到第二检测节点。 锁存电路连接到电源电压，第一检测节点和第二检测节点，并且被配置为分别基于第一检测来通过锁存节点和互补锁存器节点输出第一放大信号和第二放大信号 信号和第二检测信号。

    ELECTRONIC DEVICE AND METHOD FOR CONTROLLING NOTIFICATION IN ELECTRONIC DEVICE
    9.
    发明申请
    ELECTRONIC DEVICE AND METHOD FOR CONTROLLING NOTIFICATION IN ELECTRONIC DEVICE 有权
    用于控制电子设备通知的电子设备和方法

    公开(公告)号：US20160095083A1

    公开(公告)日：2016-03-31

    申请号：US14866074

    申请日：2015-09-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sung-Hyun Park

    IPC: H04W68/00

    CPC classification number: H04M1/72597 ,  H04M1/72522 ,  H04M1/72544 ,  H04M1/72558 ,  H04W68/00

    Abstract: An electronic device and a method controlling a notification are provided. The method includes determining an execution state of an application that is currently executed when an interruption occurs while the application is executed, and controlling whether to output a notification associated with the interruption based on the execution state of the application.

    Abstract translation: 提供电子装置和控制通知的方法。 该方法包括确定在执行应用时发生中断时当前执行的应用的执行状态，以及基于应用的执行状态来控制是否输出与中断相关联的通知。

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20150137262A1

    公开(公告)日：2015-05-21

    申请号：US14465968

    申请日：2014-08-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kang-Hyun Baek ,  Sung-Hyun Park ,  Sang-Hoon Baek ,  Tae-Joong Song

    IPC: H01L29/78 ,  H01L27/11

    CPC classification number: H01L29/785 ,  H01L27/0207 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1211 ,  H01L29/0696 ,  H01L29/4238 ,  H01L29/66795 ,  H01L29/66818

    Abstract: A semiconductor device includes: active fins protruding from an active layer and extending in a first direction; a gate structure on the active fins extending in a second direction intersecting the first direction; and a spacer on at least one side of the gate structure, wherein each of the active fins includes a first region and a second region adjacent to the first direction in the first direction, and a width of the first region in the second direction is different from a width of the second region in the second direction.

    Abstract translation: 半导体器件包括：从有源层突出并沿第一方向延伸的有源鳍; 主动翅片上的栅极结构沿与第一方向相交的第二方向延伸; 以及在所述栅极结构的至少一侧上的间隔物，其中所述活性鳍片中的每一个包括第一区域和与所述第一方向上的所述第一方向相邻的第二区域，并且所述第一区域在所述第二方向上的宽度不同 从第二方向的第二区域的宽度。

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