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公开(公告)号:US11087996B2
公开(公告)日:2021-08-10
申请号:US16371461
申请日:2019-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung-Min Shin , Seok-Hoon Kim , Young-Hoo Kim , In-Gi Kim , Tae-Hong Kim , Sung-Hyun Park , Jin-Woo Lee , Ji-Hoon Cha , Yong-Jun Choi
IPC: H01L21/67 , H01L21/02 , H01J37/32 , G02B27/09 , B23K26/352 , B08B7/00 , H01L29/66 , H01L27/11556 , H01L27/11582
Abstract: A dry cleaning apparatus includes a chamber, a substrate support supporting a substrate within the chamber, a shower head arranged in an upper portion of the chamber to supply a dry cleaning gas toward the substrate, the shower head including an optical window transmitting a laser light therethrough toward the substrate support, a plasma generator generating plasma from the dry cleaning gas, and a laser irradiator irradiating the laser light on the substrate through the optical window and the plasma to heat the substrate.
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公开(公告)号:US09972683B2
公开(公告)日:2018-05-15
申请号:US15145040
申请日:2016-05-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Kwon Kim , Ji-Hoon Cha
IPC: H01L29/10 , H01L21/8238 , H01L27/11 , H01L27/092 , H01L29/161 , H01L29/165 , H01L29/16 , H01L49/02
CPC classification number: H01L29/1054 , H01L21/823807 , H01L21/823821 , H01L27/092 , H01L27/0924 , H01L27/1104 , H01L27/1116 , H01L28/00 , H01L29/1608 , H01L29/161 , H01L29/165
Abstract: A method of fabricating a semiconductor device is provided as follows. A strain relaxed buffer (SRB) layer is formed on a substrate. The SRB layer is formed of a first silicon germanium alloy (SiGe) layer which has a first atomic percent of germanium (Ge) atoms. A heterogeneous channel layer is formed on the SRB layer. The heterogeneous channel layer includes a silicon layer on a first region of the SRB layer and a second SiGe layer on a second region of the SRB layer. The second SiGe layer includes a second atomic percent of germanium greater than the first atomic percent of germanium atoms. The silicon layer is in contact with the second SiGe layer.
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公开(公告)号:US09865597B2
公开(公告)日:2018-01-09
申请号:US14847994
申请日:2015-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ji-Hoon Cha , Sang-Woo Lee
IPC: H01L21/70 , H01L27/092 , H01L29/06 , H01L29/161 , H01L21/8238
CPC classification number: H01L27/0924 , H01L21/823807 , H01L21/823821 , H01L21/823878 , H01L27/0922 , H01L29/0649 , H01L29/161 , H01L29/66818
Abstract: A semiconductor device is provided as follows. A first fin is formed on a first region of a substrate, extending in a first direction. A second fin is formed on a second region of the substrate, extending in a second direction. A first dual liner is formed on a lateral surface of the first fin. The first dual liner includes a first liner and a second liner. The first liner is interposed between the second liner and the lateral surface of the first fin. A second dual liner is formed on a lateral surface of the second fin. The second dual liner includes a third liner and a fourth liner. The third liner is interposed between the fourth liner and the lateral surface of the second fin. An epitaxial layer surrounds a top portion of the second fin. The first liner and the third liner have different thicknesses.
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公开(公告)号:US09613811B2
公开(公告)日:2017-04-04
申请号:US14525467
申请日:2014-10-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae-Jik Baek , Sang-Jine Park , Bo-Un Yoon , Young-Sang Youn , Ji-Min Jeong , Ji-Hoon Cha
IPC: H01L21/338 , H01L21/266 , H01L21/8234 , H01L21/8238 , H01L29/66
CPC classification number: H01L21/266 , H01L21/823418 , H01L21/823431 , H01L21/823468 , H01L21/823821 , H01L21/845 , H01L29/66575
Abstract: A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.
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公开(公告)号:US20150162197A1
公开(公告)日:2015-06-11
申请号:US14525467
申请日:2014-10-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae-Jik BAEK , Sang-Jine Park , Bo-Un Yoon , Young-Sang Youn , Ji-Min Jeong , Ji-Hoon Cha
IPC: H01L21/266 , H01L21/033 , H01L21/8234
CPC classification number: H01L21/266 , H01L21/823418 , H01L21/823431 , H01L21/823468 , H01L21/823821 , H01L21/845 , H01L29/66575
Abstract: A first protective layer, a mask layer, a second protective layer and a photoresist layer are sequentially formed on a substrate. A photoresist pattern is formed by partially removing the photoresist layer. An ion implantation mask is formed by sequentially etching the second protective layer, the mask layer and the first protective layer using the photoresist pattern. The ion implantation mask exposes the substrate. Impurities are implanted in an upper portion of the substrate exposed by the ion implantation mask.
Abstract translation: 在基板上依次形成第一保护层,掩模层,第二保护层和光致抗蚀剂层。 通过部分去除光致抗蚀剂层形成光致抗蚀剂图案。 通过使用光致抗蚀剂图案依次蚀刻第二保护层,掩模层和第一保护层来形成离子注入掩模。 离子注入掩模暴露衬底。 将杂质植入由离子注入掩模暴露的衬底的上部。
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公开(公告)号:US09627514B1
公开(公告)日:2017-04-18
申请号:US15188619
申请日:2016-06-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dong-Kwon Kim , Ji-Hoon Cha
IPC: H01L29/66 , H01L29/78 , H01L21/768
CPC classification number: H01L29/66795 , H01L21/7682 , H01L21/76897 , H01L29/41791 , H01L29/6653 , H01L29/785
Abstract: A method of fabricating a semiconductor device is provided as follows. Epitaxial layers is formed on an active fin structure of a substrate. First metal gate electrodes are formed on the active fin structure. Each first metal gate electrode and each epitaxial layer are alternately disposed in a first direction on the active fin structure. ILD patterns are formed on the epitaxial layers, extending in a second direction crossing the first direction. Sacrificial spacer patterns are formed on the first metal gate electrodes. Each of the plurality of sacrificial spacer patterns covers a corresponding first metal gate electrode of the first metal gate electrodes. Self-aligned contact holes and sacrificial spacers are formed by removing the ILD patterns. Each self-aligned contact hole exposes a corresponding epitaxial layer disposed under each ILD pattern. Source/drain electrodes are formed in the self-aligned contact holes. The sacrificial spacers are replaced with air spacers.
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公开(公告)号:US09136135B2
公开(公告)日:2015-09-15
申请号:US13944087
申请日:2013-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae-Jik Baek , Ji-Hoon Cha , Bo-Un Yoon , Kwang-Wook Lee , Jeong-Nam Han
IPC: H01L21/306 , H01L21/8234 , H01L21/8238 , H01L29/78 , H01L29/66
CPC classification number: H01L21/30604 , H01L21/30608 , H01L21/823412 , H01L21/823425 , H01L21/823807 , H01L21/823814 , H01L29/66628 , H01L29/7833 , H01L29/7848
Abstract: A method of fabricating a semiconductor device includes forming a gate pattern on a substrate, and etching sides of the gate pattern using a first wet-etching process to form a first recess. The first wet-etching process includes using an etchant containing a first chemical substance including a hydroxyl functional group (—OH) and a second chemical substance capable of oxidizing the substrate. The concentration of the second chemical substance is 1.5 times or less the concentration of the first chemical substance.
Abstract translation: 制造半导体器件的方法包括在衬底上形成栅极图案,并且使用第一湿蚀刻工艺蚀刻栅极图案的侧面以形成第一凹部。 第一湿蚀刻工艺包括使用含有包含羟基官能团(-OH)的第一化学物质和能够氧化底物的第二化学物质的蚀刻剂。 第二化学物质的浓度为第一化学物质浓度的1.5倍以下。
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公开(公告)号:US11742221B2
公开(公告)日:2023-08-29
申请号:US17376369
申请日:2021-07-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung-Min Shin , Seok-Hoon Kim , Young-Hoo Kim , In-Gi Kim , Tae-Hong Kim , Sung-Hyun Park , Jin-Woo Lee , Ji-Hoon Cha , Yong-Jun Choi
IPC: H01L21/67 , H01L21/02 , H01J37/32 , G02B27/09 , B23K26/352 , B08B7/00 , H01L29/66 , H10B41/27 , H10B43/27
CPC classification number: H01L21/67034 , B08B7/0042 , B23K26/352 , G02B27/0955 , H01J37/3244 , H01J37/32568 , H01L21/02098 , H01J2237/335 , H01L29/66545 , H01L29/66795 , H10B41/27 , H10B43/27
Abstract: A dry cleaning apparatus includes a chamber, a substrate support supporting a substrate within the chamber, a shower head arranged in an upper portion of the chamber to supply a dry cleaning gas toward the substrate, the shower head including an optical window transmitting a laser light therethrough toward the substrate support, a plasma generator generating plasma from the dry cleaning gas, and a laser irradiator irradiating the laser light on the substrate through the optical window and the plasma to heat the substrate.
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公开(公告)号:US09040415B2
公开(公告)日:2015-05-26
申请号:US14286108
申请日:2014-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang-Jine Park , Bo-Un Yoon , Young-Sang Youn , Jeong-Nam Han , Kee-Sang Kwon , Doo-Sung Yun , Byung-Kwon Cho , Ji-Hoon Cha
IPC: H01L21/4763 , H01L29/66
CPC classification number: H01L29/66477 , H01L21/02063 , H01L21/31116 , H01L21/76804 , H01L21/76814 , H01L21/76826 , H01L21/76897 , H01L29/41791 , H01L29/66553 , H01L29/66795 , H01L2221/1063
Abstract: A method for forming a trench includes etching an oxide layer to form a trench therein, conformally forming a first reaction layer along a surface of the trench, the first reaction layer including a first region on an upper portion of the trench and a second region on a lower portion of the trench, forming a barrier layer by reacting a first amount of etching gas with the first region of the first reaction layer, and etching the oxide layer on a lower portion of the second region by reacting a second amount of etching gas with the second region of the first reaction layer, the second amount of etching gas being greater than the first amount of etching gas.
Abstract translation: 一种用于形成沟槽的方法包括蚀刻氧化物层以在其中形成沟槽,沿着沟槽的表面共形形成第一反应层,第一反应层包括沟槽上部的第一区域和第二区域 沟槽的下部,通过使第一量的蚀刻气体与第一反应层的第一区域反应形成阻挡层,并且通过使第二量的蚀刻气体反应来蚀刻第二区域的下部的氧化物层 与第一反应层的第二区域相比,第二量的蚀刻气体大于第一量的蚀刻气体。
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