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公开(公告)号:US20130337631A1
公开(公告)日:2013-12-19
申请号:US13525041
申请日:2012-06-15
申请人: Sen-Hong Syue , Pu-Fang Chen , Shiang-Bau Wang
发明人: Sen-Hong Syue , Pu-Fang Chen , Shiang-Bau Wang
IPC分类号: H01L21/762 , C30B15/04
CPC分类号: C30B15/04 , C30B15/00 , C30B15/203 , C30B15/206 , C30B15/22 , C30B29/06 , C30B31/02 , C30B31/04 , C30B31/165 , C30B33/00 , H01L21/0201 , H01L21/31053 , H01L21/311 , H01L21/3225 , H01L21/76224 , H01L29/365 , H01L29/78
摘要: A system and method for providing support to semiconductor wafer is provided. An embodiment comprises introducing a vacancy enhancing material during the formation of a semiconductor ingot prior to the semiconductor wafer being separated from the semiconductor ingot. The vacancy enhancing material forms vacancies at a high density within the semiconductor ingot, and the vacancies form bulk micro defects within the semiconductor wafer during high temperature processes such as annealing. These bulk micro defects help to provide support and strengthen the semiconductor wafer during subsequent processing and helps to reduce or eliminate a fingerprint overlay that may otherwise occur.
摘要翻译: 提供了一种用于向半导体晶片提供支撑的系统和方法。 一个实施例包括在半导体晶片与半导体晶锭分离之前,在形成半导体晶锭期间引入空位增强材料。 空位增强材料在半导体晶锭内以高密度形成空位,并且在诸如退火的高温过程中,空位形成半导体晶片内的体微小缺陷。 这些大量微缺陷有助于在后续处理过程中提供支撑并加强半导体晶片,并有助于减少或消除否则会发生的指纹叠加。
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公开(公告)号:US09945048B2
公开(公告)日:2018-04-17
申请号:US13525041
申请日:2012-06-15
申请人: Sen-Hong Syue , Pu-Fang Chen , Shiang-Bau Wang
发明人: Sen-Hong Syue , Pu-Fang Chen , Shiang-Bau Wang
IPC分类号: C30B15/04 , H01L21/02 , C30B15/20 , C30B31/02 , C30B31/04 , H01L21/311 , C30B15/22 , H01L29/36 , H01L21/762 , C30B31/16 , H01L21/3105 , C30B29/06 , H01L21/322 , C30B15/00 , C30B33/00 , H01L29/78
CPC分类号: C30B15/04 , C30B15/00 , C30B15/203 , C30B15/206 , C30B15/22 , C30B29/06 , C30B31/02 , C30B31/04 , C30B31/165 , C30B33/00 , H01L21/0201 , H01L21/31053 , H01L21/311 , H01L21/3225 , H01L21/76224 , H01L29/365 , H01L29/78
摘要: A system and method for providing support to semiconductor wafer is provided. An embodiment comprises introducing a vacancy enhancing material during the formation of a semiconductor ingot prior to the semiconductor wafer being separated from the semiconductor ingot. The vacancy enhancing material forms vacancies at a high density within the semiconductor ingot, and the vacancies form bulk micro defects within the semiconductor wafer during high temperature processes such as annealing. These bulk micro defects help to provide support and strengthen the semiconductor wafer during subsequent processing and helps to reduce or eliminate a fingerprint overlay that may otherwise occur.
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公开(公告)号:US08932945B2
公开(公告)日:2015-01-13
申请号:US13544467
申请日:2012-07-09
申请人: Sen-Hong Syue , Chung-Chun Ho , Pu-Fang Chen , Shiang-Bau Wang
发明人: Sen-Hong Syue , Chung-Chun Ho , Pu-Fang Chen , Shiang-Bau Wang
CPC分类号: H01L21/02337 , G03F1/144 , G03F1/36 , G03F7/70425 , G11B20/18 , G11B20/1833 , G11B2020/183 , G11B2020/1836 , H01L21/68 , H01L21/762 , H01L21/76224 , H01L29/68 , H01L29/7833
摘要: A system and method for mitigating annealing fingerprints in semiconductor wafers is provided. An embodiment comprises aligning the semiconductor wafers prior to each annealing step. This alignment generates similar or identical fingerprints in each of the semiconductor wafers manufactured. With the fingerprint known, a single compensation model for a subsequent photoresist may be utilized to compensate for the fingerprint in each of the semiconductor wafers.
摘要翻译: 提供了一种减轻半导体晶片退火指纹的系统和方法。 一个实施例包括在每个退火步骤之前对准半导体晶片。 该对准在制造的每个半导体晶片中产生类似或相同的指纹。 利用指纹已知,用于后续光致抗蚀剂的单个补偿模型可用于补偿每个半导体晶片中的指纹。
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公开(公告)号:US20140011348A1
公开(公告)日:2014-01-09
申请号:US13544467
申请日:2012-07-09
申请人: Sen-Hong Syue , Chung-Chun Ho , Pu-Fang Chen , Shiang-Bau Wang
发明人: Sen-Hong Syue , Chung-Chun Ho , Pu-Fang Chen , Shiang-Bau Wang
IPC分类号: H01L21/306 , H01L21/26
CPC分类号: H01L21/02337 , G03F1/144 , G03F1/36 , G03F7/70425 , G11B20/18 , G11B20/1833 , G11B2020/183 , G11B2020/1836 , H01L21/68 , H01L21/762 , H01L21/76224 , H01L29/68 , H01L29/7833
摘要: A system and method for mitigating annealing fingerprints in semiconductor wafers is provided. An embodiment comprises aligning the semiconductor wafers prior to each annealing step. This alignment generates similar or identical fingerprints in each of the semiconductor wafers manufactured. With the fingerprint known, a single compensation model for a subsequent photoresist may be utilized to compensate for the fingerprint in each of the semiconductor wafers.
摘要翻译: 提供了一种减轻半导体晶片退火指纹的系统和方法。 一个实施例包括在每个退火步骤之前对准半导体晶片。 该对准在制造的每个半导体晶片中产生类似或相同的指纹。 利用指纹已知,用于后续光致抗蚀剂的单个补偿模型可用于补偿每个半导体晶片中的指纹。
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公开(公告)号:US07947551B1
公开(公告)日:2011-05-24
申请号:US12892331
申请日:2010-09-28
申请人: Sen-Hong Syue , Bor Chiuan Hsieh , Shiang-Bau Wang
发明人: Sen-Hong Syue , Bor Chiuan Hsieh , Shiang-Bau Wang
IPC分类号: H01L21/00
CPC分类号: H01L21/02337 , H01L21/02274 , H01L21/02282 , H01L21/02356 , H01L21/76224
摘要: An embodiment of the disclosure includes a method of forming a shallow trench isolation structure. A substrate is provided. The substrate includes a top surface. A trench is formed to extend from the top surface into the substrate. The trench has sidewalls and a bottom surface. A silicon liner layer is formed on the sidewalls and the bottom surface. A flowable dielectric material is filled in the trench. An anneal process is performed to densify the flowable dielectric material and convert the silicon liner layer into a silicon oxide layer simultaneously.
摘要翻译: 本公开的实施例包括形成浅沟槽隔离结构的方法。 提供基板。 衬底包括顶表面。 形成沟槽以从顶表面延伸到衬底中。 沟槽具有侧壁和底面。 在侧壁和底表面上形成硅衬层。 可流动介电材料填充在沟槽中。 进行退火处理以使可流动电介质材料致密化并同时将硅衬层转化为氧化硅层。
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