公开(公告)号：US20050056242A1

公开(公告)日：2005-03-17

申请号：US10927093

申请日：2004-08-27

申请人： Shinichi Murata ,  Yusaku Saito ,  Norihiko Kaneko ,  Takehiko Ogasahara

发明人： Shinichi Murata ,  Yusaku Saito ,  Norihiko Kaneko ,  Takehiko Ogasahara

IPC分类号： F01L1/24 ,  F01L13/00 ,  F01N3/24 ,  F02D13/02 ,  F02D41/00 ,  F02D41/04 ,  F02D43/00 ,  F02M25/07 ,  F02P5/15 ,  F01L1/34 ,  F02N17/00

CPC分类号： F02D13/0211 ,  F02D13/0261 ,  F02D41/0002 ,  F02D41/187 ,  F02D2041/001 ,  F02D2200/0404 ,  F02D2200/501 ,  F02D2200/602 ,  F02M26/01 ,  Y02T10/18 ,  Y02T10/42

摘要： An internal combustion engine comprises, an intake valve, an exhaust valve, an exhaust gas purifying catalyst, and a valve mechanism which closes the intake valve after a piston reaches the bottom dead center and opens the exhaust valve before the piston reaches the bottom dead center in a hot state of the internal combustion engine, advances the opening timing of the intake valve from the opening timing of the intake valve in the hot state and retards the closing timing of the intake valve from the closing timing of the intake valve in the hot state when the internal combustion engine is cold, and opens the exhaust valve in substantially the same timing as the opening timing of the exhaust valve in the hot state, and closes the exhaust valve at substantially the same timing as closing timing of the exhaust valve in the hot state when the internal combustion engine is cold.

摘要翻译： 内燃机包括进气阀，排气阀，排气净化催化剂和在活塞到达下止点之后关闭进气门并在活塞到达下止点之前打开排气阀的阀机构 在内燃机的热状态下，将进气阀的打开正时从进气阀的打开正时提前到热状态，并且在进气阀的关闭正时从加热时的进气门的关闭正时延迟 在内燃机冷的状态下，与处于热状态的排气阀的打开正时基本相同的时刻打开排气阀，并且与排气门的关闭正时基本相同的时刻关闭排气阀 内燃机冷时的热状态。

公开(公告)号：US06941908B2

公开(公告)日：2005-09-13

申请号：US10927093

申请日：2004-08-27

申请人： Shinichi Murata ,  Yusaku Saito ,  Norihiko Kaneko ,  Takehiko Ogasahara

发明人： Shinichi Murata ,  Yusaku Saito ,  Norihiko Kaneko ,  Takehiko Ogasahara

IPC分类号： F01L1/24 ,  F01L13/00 ,  F01N3/24 ,  F02D13/02 ,  F02D41/00 ,  F02D41/04 ,  F02D43/00 ,  F02M25/07 ,  F02P5/15 ,  F01L1/34

CPC分类号： F02D13/0211 ,  F02D13/0261 ,  F02D41/0002 ,  F02D41/187 ,  F02D2041/001 ,  F02D2200/0404 ,  F02D2200/501 ,  F02D2200/602 ,  F02M26/01 ,  Y02T10/18 ,  Y02T10/42

摘要： An engine includes, a cylinder head, an intake valve, an exhaust valve, and a first clearance adjusting mechanism for actuating the intake valve. The first clearance adjusting mechanism (1) maintains a first valve clearance when the intake valve and the cylinder head are in a cold state, such that the intake valve closes after a bottom dead center, and (2) maintains a second valve clearance, shorter than the first valve clearance, when a temperature of the intake valve is in a hot state and a temperature of the cylinder head is still in the cold state, after a cold start of the engine, such that an open timing of the intake valve is advanced and a close timing of the intake valve is retarded. The exhaust valve opens and closes at fixed predetermined timings regardless of a temperature of the exhaust valve and the cylinder head.

摘要翻译： 发动机包括气缸盖，进气阀，排气阀和用于致动进气门的第一间隙调节机构。 当进气阀和气缸盖处于冷态时，第一间隙调节机构（1）保持第一阀间隙，使得进气门在下止点后关闭，和（2）保持第二阀间隙，更短 比起第一阀间隙，当进气门的温度处于热状态并且气缸盖的温度仍然处于冷态时，在发动机冷起动之后，使得进气门的打开正时为 进气阀的先进和关闭正时延迟。 无论排气阀和气缸盖的温度如何，排气门以固定的预定时间打开和关闭。

公开(公告)号：US07619306B2

公开(公告)日：2009-11-17

申请号：US11936179

申请日：2007-11-07

申请人： Norihiko Kaneko

发明人： Norihiko Kaneko

IPC分类号： H01L23/08

CPC分类号： H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor device includes a semiconductor substrate, and a plurality of wiring lines provided on one side of the semiconductor substrate, each of the wiring lines having a connection pad portion. An overcoat film is provided on the wiring lines and the one side of the semiconductor substrate, The overcoat film has a plurality of openings in parts corresponding to the connection pad portions of the wiring lines. A plurality of foundation metal layers are respectively provided on inner surfaces of the openings of the overcoat film and electrically connected to the pad portions of the wiring lines. A plurality of projecting electrodes are respectively provided on the foundation metal layers in the openings of the overcoat film.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底的一侧上的多个布线，每个布线具有连接焊盘部分。 在布线和半导体基板的一侧设置有覆盖膜。该外涂膜具有与布线的连接焊盘部对应的部分的多个开口部。 多层基底金属层分别设置在外涂膜的开口的内表面上，并电连接到布线的焊盘部分。 多层突起电极分别设置在覆盖膜的开口中的基础金属层上。

公开(公告)号：US07888238B2

公开(公告)日：2011-02-15

申请号：US12330745

申请日：2008-12-09

申请人： Shinji Wakisaka ,  Norihiko Kaneko

发明人： Shinji Wakisaka ,  Norihiko Kaneko

IPC分类号： H01L21/00

CPC分类号： H01L23/525 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/5329 ,  H01L24/11 ,  H01L24/12 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18301 ,  H01L2924/30105

摘要： A wafer process material is prepared which has a plurality of semiconductor formation regions of different planar sizes, each including a low dielectric constant film/wiring line stack structure component. A laser beam is applied onto a dicing street of the necessary semiconductor formation region and onto its straight extension in order to remove partial areas of the low dielectric constant film/wiring line stack structure components of the necessary semiconductor formation region and the unnecessary semiconductor formation region so that first groove and the second groove are formed. A protective film is formed in the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component. An upper wiring line and a sealing film are formed on the protective film, and a semiconductor wafer is cut along the dicing street.

摘要翻译： 制备具有多个不同平面尺寸的半导体形成区域的晶片处理材料，每个半导体形成区域包括低介电常数膜/布线层叠结构部件。 将激光束施加到必要的半导体形成区域的切割街道上，并将其施加到其直线延伸部上，以便去除所需半导体形成区域的低介电常数薄膜/布线层叠结构部件的部分区域和不需要的半导体形成区域 从而形成第一槽和第二槽。 在形成于不需要的半导体形成区域的第二沟槽和低介电常数膜/布线堆叠结构部件上形成保护膜。 在保护膜上形成上部布线和密封膜，沿着切割街切割半导体晶片。

公开(公告)号：US07838394B2

公开(公告)日：2010-11-23

申请号：US11706772

申请日：2007-02-15

申请人： Norihiko Kaneko

发明人： Norihiko Kaneko

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/14 ,  H01L2924/00014

摘要： A semiconductor substrate in a wafer state having one surface provided thereon a plurality of external connection electrodes is stacked onto a support film. The wafer-state semiconductor substrate stuck on the support film is cut into a plurality of chip size semiconductor substrates, whereby the adjacent semiconductor substrates are separated from each other, and each semiconductor substrate is provided with at least one of the external connection electrodes. At least one protection film is formed on the other surface of the chip size semiconductor substrates, and on a peripheral side surface thereof that the chip size semiconductor substrates, which are adjacent to each other, are separated from each other.

摘要翻译： 在其上设置有多个外部连接电极的一个表面的晶片状态的半导体基板被堆叠在支撑膜上。 粘贴在支撑膜上的晶片状半导体基板被切割成多个芯片尺寸的半导体基板，由此相邻的半导体基板彼此分离，并且每个半导体基板设置有至少一个外部连接电极。 在芯片尺寸半导体衬底的另一个表面上形成至少一个保护膜，并且在其周边侧表面上彼此相邻的芯片尺寸半导体衬底彼此分离。

公开(公告)号：US07944064B2

公开(公告)日：2011-05-17

申请号：US11656866

申请日：2007-01-22

申请人： Shinji Wakisaka ,  Tomohiro Ito ,  Shigeru Yokoyama ,  Osamu Kuwabara ,  Norihiko Kaneko ,  Syouichi Kotani

发明人： Shinji Wakisaka ,  Tomohiro Ito ,  Shigeru Yokoyama ,  Osamu Kuwabara ,  Norihiko Kaneko ,  Syouichi Kotani

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2223/5448 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate which has a plurality of semiconductor device formation regions and alignment mark formation region having the same planar size as that of the semiconductor device formation region, a plurality of post electrodes which are formed in each semiconductor device formation region, and an alignment post electrode which is formed in the alignment mark formation region and smaller in number than the post electrodes formed in each semiconductor device formation region.

摘要翻译： 半导体器件包括具有多个半导体器件形成区域和具有与半导体器件形成区域相同的平面尺寸的对准标记形成区域的半导体衬底，形成在每个半导体器件形成区域中的多个柱状电极， 以及形成在对准标记形成区域中并且数量小于形成在每个半导体器件形成区域中的柱状电极的定向柱状电极。

公开(公告)号：US20070190689A1

公开(公告)日：2007-08-16

申请号：US11706772

申请日：2007-02-15

申请人： Norihiko Kaneko

发明人： Norihiko Kaneko

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L21/568 ,  H01L21/6836 ,  H01L23/3114 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/14 ,  H01L2924/00014

摘要： A semiconductor substrate in a wafer state having one surface provided thereon a plurality of external connection electrodes is stacked onto a support film. The wafer-state semiconductor substrate stuck on the support film is cut into a plurality of chip size semiconductor substrates, whereby the adjacent semiconductor substrates are separated from each other, and each semiconductor substrate is provided with at least one of the external connection electrodes. At least one protection film is formed on the other surface of the chip size semiconductor substrates, and on a peripheral side surface thereof that the chip size semiconductor substrates, which are adjacent to each other, are separated from each other.

摘要翻译： 在其上设置有多个外部连接电极的一个表面的晶片状态的半导体基板被堆叠在支撑膜上。 粘贴在支撑膜上的晶片状半导体基板被切割成多个芯片尺寸的半导体基板，由此相邻的半导体基板彼此分离，并且每个半导体基板设置有至少一个外部连接电极。 在芯片尺寸半导体衬底的另一个表面上形成至少一个保护膜，并且在其周边侧表面上彼此相邻的芯片尺寸半导体衬底彼此分离。

公开(公告)号：US20070164432A1

公开(公告)日：2007-07-19

申请号：US11656866

申请日：2007-01-22

申请人： Shinji Wakisaka ,  Tomohiro Ito ,  Shigeru Yokoyama ,  Osamu Kuwabara ,  Norihiko Kaneko ,  Syouichi Kotani

发明人： Shinji Wakisaka ,  Tomohiro Ito ,  Shigeru Yokoyama ,  Osamu Kuwabara ,  Norihiko Kaneko ,  Syouichi Kotani

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/544 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2223/5448 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05647 ,  H01L2224/11 ,  H01L2224/1147 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device includes a semiconductor substrate which has a plurality of semiconductor device formation regions and alignment mark formation region having the same planar size as that of the semiconductor device formation region, a plurality of post electrodes which are formed in each semiconductor device formation region, and an alignment post electrode which is formed in the alignment mark formation region and smaller in number than the post electrodes formed in each semiconductor device formation region.

摘要翻译： 半导体器件包括具有多个半导体器件形成区域和具有与半导体器件形成区域相同的平面尺寸的对准标记形成区域的半导体衬底，形成在每个半导体器件形成区域中的多个柱状电极， 以及形成在对准标记形成区域中并且数量小于形成在每个半导体器件形成区域中的柱状电极的定向柱状电极。

公开(公告)号：US08097941B2

公开(公告)日：2012-01-17

申请号：US12566423

申请日：2009-09-24

申请人： Norihiko Kaneko

发明人： Norihiko Kaneko

IPC分类号： H01L23/02

CPC分类号： H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor device includes a semiconductor substrate, and a plurality of wiring lines provided on one side of the semiconductor substrate, each of the wiring lines having a connection pad portion. An overcoat film is provided on the wiring lines and the one side of the semiconductor substrate. The overcoat film has a plurality of openings in parts corresponding to the connection pad portions of the wiring lines. A plurality of foundation metal layers are respectively provided on inner surfaces of the openings of the overcoat film and electrically connected to the pat portions of the wiring lines. A plurality of projecting electrodes are respectively provided on the foundation metal layers in the openings of the overcoat film.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底的一侧上的多个布线，每个布线具有连接焊盘部分。 在布线和半导体基板的一侧设置覆盖膜。 外涂膜具有与布线的连接焊盘部对应的部分的多个开口部。 在外涂膜的开口的内表面上分别设置有多个基础金属层，并与布线的拍打部电连接。 多层突起电极分别设置在覆盖膜的开口中的基础金属层上。

公开(公告)号：US20100015795A1

公开(公告)日：2010-01-21

申请号：US12566423

申请日：2009-09-24

申请人： Norihiko Kaneko

发明人： Norihiko Kaneko

IPC分类号： H01L21/3205

CPC分类号： H01L23/3114 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A semiconductor device includes a semiconductor substrate, and a plurality of wiring lines provided on one side of the semiconductor substrate, each of the wiring lines having a connection pad portion. An overcoat film is provided on the wiring lines and the one side of the semiconductor substrate. The overcoat film has a plurality of openings in parts corresponding to the connection pad portions of the wiring lines. A plurality of foundation metal layers are respectively provided on inner surfaces of the openings of the overcoat film and electrically connected to the pat portions of the wiring lines. A plurality of projecting electrodes are respectively provided on the foundation metal layers in the openings of the overcoat film.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底的一侧上的多个布线，每个布线具有连接焊盘部分。 在布线和半导体基板的一侧设置覆盖膜。 外涂膜具有与布线的连接焊盘部对应的部分的多个开口部。 在外涂膜的开口的内表面上分别设置有多个基础金属层，并与布线的拍打部电连接。 多层突起电极分别设置在覆盖膜的开口中的基础金属层上。