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公开(公告)号：US11847023B2
公开(公告)日：2023-12-19
申请号：US17963999
申请日：2022-10-11
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
CPC classification number: G06F11/1068 , G06F11/1072 , G06F11/1076 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/26 , G11C29/52 , G11C16/0483 , G11C2211/5641
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号：US20230080339A1
公开(公告)日：2023-03-16
申请号：US17991799
申请日：2022-11-21
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.
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公开(公告)号：US11537469B2
公开(公告)日：2022-12-27
申请号：US17468704
申请日：2021-09-08
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.
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公开(公告)号：US11508446B2
公开(公告)日：2022-11-22
申请号：US17030330
申请日：2020-09-23
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: The present invention provides a method for access a flash memory module, wherein the method includes the steps of: sending a read command to the flash memory module to read a plurality of memory cells of at least one word line of the flash memory module by using a plurality of read voltages, wherein each memory cell is configured to store a plurality of bits, each memory cell has a plurality of states, the states are used to indicate different combinations of the plurality of bits; obtaining readout information from the flash memory module; analyzing the readout information to determine numbers of the states of the memory cells; determining if the memory cells are balance or unbalance according the numbers of the states of the memory cells to generate a determination result; and referring to the determination result to adjust voltage levels of the plurality of read voltages.
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公开(公告)号：US11487655B2
公开(公告)日：2022-11-01
申请号：US17355192
申请日：2021-06-23
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Tsung-Chieh Yang
IPC: G06F12/02 , G11C11/4093 , G06F12/0882 , G11C11/4099 , G11C11/4074 , G06F13/16
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.
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Patent Agency Ranking
公开(公告)号：US11323133B2
公开(公告)日：2022-05-03
申请号：US16896210
申请日：2020-06-09
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu
Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programming and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.
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公开(公告)号：US20210406119A1
公开(公告)日：2021-12-30
申请号：US17468704
申请日：2021-09-08
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.
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8.发明授权公开(公告)号：US11210209B2
公开(公告)日：2021-12-28
申请号：US16686214
申请日：2019-11-18
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Pi-Ju Tsai , Tsung-Chieh Yang
IPC: G06F12/02 , G06F12/0882 , G06F3/06 , G06F13/16 , G06F12/0891 , G06F11/07
Abstract: The present invention provides a method for managing a flash memory module, wherein the flash memory module includes a plurality of flash memory chips, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the method includes the steps of: using a time management circuit to generate current time information; when data is written into any one of the blocks, recording the time information generated by the time management circuit; and determining at least one specific block according to quantity of invalid pages within each block and the time information of each block.
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公开(公告)号：US11086567B2
公开(公告)日：2021-08-10
申请号：US16505725
申请日：2019-07-09
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
Abstract: The present invention provides a method for accessing a flash memory module, wherein the flash memory module comprises at least one flash memory chip, each flash memory chip comprises a plurality of blocks, each block comprises a plurality of pages, and the method comprises: sending a read command to the flash memory module to ask for data on at least one memory unit; and analyzing state information of a plurality of memory cells of the memory unit based on information from the flash memory module to determine a decoding method adopted by a decoder.
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公开(公告)号：US11074174B2
公开(公告)日：2021-07-27
申请号：US16683191
申请日：2019-11-13
Applicant: Silicon Motion, Inc.
Inventor： Jian-Dong Du , Chia-Jung Hsiao , Tsung-Chieh Yang
IPC: G11C11/4093 , G11C11/4074 , G06F12/02 , G06F12/0882 , G11C11/4099 , G06F13/16
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.
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