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公开(公告)号：US20240201282A1
公开(公告)日：2024-06-20
申请号：US18228479
申请日：2023-07-31
Applicant: Texas Instruments Incorporated
Abstract: An example apparatus includes: a first switch having a control terminal; a second switch having a first terminal and a control terminal; detection circuitry having a first terminal and a second terminal the detection circuitry configured to detect a parasitic resistance at the first terminal of the second switch; and controller circuitry having a first terminal and a second terminal, the first terminal of the controller circuitry coupled to the control terminal of the first switch and the control terminal of the second switch, the second terminal of the controller circuitry coupled to second terminal of the detection circuitry, the controller circuitry configured to disable the first switch responsive to the detection of the parasitic resistance.
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2.发明申请公开(公告)号：US20220416741A1
公开(公告)日：2022-12-29
申请号：US17362443
申请日：2021-06-29
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Oswal , Raja Reddy Patukuri , Aravind Miriyala , Anand Hariraj Udupa , Hari Babu Tippana , Aatish Chandak
Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.
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公开(公告)号：US10583461B2
公开(公告)日：2020-03-10
申请号：US15852018
申请日：2017-12-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Aravind Miriyala , Naveen Kumar Ginige , Vajeed Nimran , Saugata Datta , Shabbir Amjhera Wala
IPC: B06B1/02 , H03K17/687 , A61B8/00
Abstract: A semiconductor device includes a trim storage and an encoder. The trim storage stores trim values. The encoder determines a magnitude of a supply voltage, determines a magnitude of a handle voltage, determines a source-to-handle voltage of a first transistor, and determines a source-to-handle voltage of a second transistor. Further, the encoder determines a target number of selectable first transistor units comprising the first transistor to select for the first transistor. Based on a trim value from the trim storage, the source-to-handle voltage of the first transistor and the source-to-handle voltage of the second transistor, the encoder determines a target number of selectable second transistor units comprising the second transistor to select for the second transistor. The encoder asserts control signals to select the target number of selectable first transistor units and the target number of selectable second transistor units.
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公开(公告)号：US20240206034A1
公开(公告)日：2024-06-20
申请号：US18228454
申请日：2023-07-31
Applicant: Texas Instruments Incorporated
Inventor： Raja Reddy Patukuri , Anand Hariraj Udupa , Aravind Miriyala , Sandeep Oswal , Rajat Agarwal
IPC: H05B45/347 , H05B45/3725 , H05B45/44
CPC classification number: H05B45/347 , H05B45/3725 , H05B45/44 , A61B5/0059
Abstract: An example apparatus includes: driver circuitry having a first terminal and a second terminal; and voltage control circuitry having a first terminal and a second terminal, the first terminal of the voltage control circuitry coupled to the first terminal of the driver circuitry, the second terminal of the voltage control circuitry coupled to the second terminal of the driver circuitry, the voltage control circuitry configured to supply an LED supply voltage.
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公开(公告)号：US11579106B2
公开(公告)日：2023-02-14
申请号：US16852736
申请日：2020-04-20
Applicant: Texas Instruments Incorporated
Inventor： Aatish Chandak , Raja Reddy Patukuri , Aravind Miriyala , Sandeep Oswal
Abstract: The disclosure provides a measurement circuit. The measurement circuit includes a control engine. An excitation source is coupled to the control engine. A first set of electrodes and a second set of electrodes are coupled to the excitation source and receive current from the excitation source. The control engine operates the excitation source in a first mode and a second mode. The control engine, in the first mode, measures a parasitic impedance associated with the first and the second set of electrodes, and the control engine, in the second mode, measures an impedance of the first and the second set of electrodes and of an external object.
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Patent Agency Ranking
公开(公告)号：US20180122360A1
公开(公告)日：2018-05-03
申请号：US15793537
申请日：2017-10-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ravikumar Pattipaka , Raja Sekhar Kanakamedala , Aravind Miriyala , Sandeep Kesrimal Oswal
IPC: G10K11/34 , H03K17/687 , H03K19/003 , H03K3/356 , G11C11/413 , G06F1/32 , H03K17/08 , H03K17/56 , G10K11/04
CPC classification number: G10K11/341 , B06B1/0207 , G06F1/3203 , G10K11/04 , G11C11/413 , H03K3/356113 , H03K17/08 , H03K17/56 , H03K17/687 , H03K17/6871 , H03K19/00361 , H03K19/018507 , H03K2217/0063
Abstract: The disclosure provides a level shifter. The level shifter includes a first logic block that receives an input signal and generates a primary pulsed input. A first transistor is coupled to the first logic block and a first node. A gate terminal of the first transistor receives the primary pulsed input. A latch is coupled to the first node and a second node. A second logic block receives the input signal and generates a secondary pulsed input. A second transistor is coupled between the second logic block and the second node. A gate terminal of the second transistor receives the secondary pulsed input.
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7.发明授权公开(公告)号：US11888509B2
公开(公告)日：2024-01-30
申请号：US16234672
申请日：2018-12-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Aravind Miriyala , Ravikumar Pattipaka , Raja Sekhar Kanakamedala , Sandeep Kesrimal Oswal
CPC classification number: H04B1/44 , B06B1/023 , H03K17/00 , H03K17/002 , H04B11/00 , A61B8/14 , A61B8/54 , B06B2201/76
Abstract: An ultrasound system includes a transmit-receive switch. The transmit-receive switch includes a combined transmit-receive and return-to-zero (RTZ) path. The combined transmit-receive and RTZ path includes a transistor with a first current terminal, a second current terminal, and a control terminal. The second current terminal of the transistor is coupled to a ground node via a first switch and is coupled to a receive node via a second switch. The ultrasound system also includes a receiver front-end circuit coupled to the receive node.
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公开(公告)号：US11662448B2
公开(公告)日：2023-05-30
申请号：US17487259
申请日：2021-09-28
Applicant: Texas Instruments Incorporated
Inventor： Ravikumar Pattipaka , Raja Sekhar Kanakamedala , Aravind Miriyala , Vajeed Nimran P A , Sandeep Kesrimal Oswal
CPC classification number: G01S7/52077 , A61B8/4483 , A61B8/5269
Abstract: Methods and apparatus for reducing a transient glitch in ultrasound applications are disclosed. An example apparatus includes a transducer to (A) output a signal during a transmit phase and (B) receive a reflected signal corresponding to the signal during a receive phase; a receiver switch coupled to the transducer at a first node, the receiver switch to (A) open during the transmit phase and (B) close during the receive phase; and a clamp coupled to the transducer at the first node, the clamp to provide a high impedance during the transmit phase and the receive phase and provide a low impedance during a transient phase.
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公开(公告)号：US11163046B2
公开(公告)日：2021-11-02
申请号：US16859440
申请日：2020-04-27
Applicant: Texas Instruments Incorporated
Inventor： Ravikumar Pattipaka , Raja Sekhar Kanakamedala , Aravind Miriyala , Vajeed Nimran P A , Sandeep Kesrimal Oswal
Abstract: Methods and apparatus for reducing a transient glitch in ultrasound applications are disclosed. An example apparatus includes a transducer to (A) output a signal during a transmit phase and (B) receive a reflected signal corresponding to the signal during a receive phase; a receiver switch coupled to the transducer at a first node, the receiver switch to (A) open during the transmit phase and (B) close during the receive phase; and a clamp coupled to the transducer at the first node, the clamp to provide a high impedance during the transmit phase and the receive phase and provide a low impedance during a transient phase.
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10.发明授权公开(公告)号：US12095431B2
公开(公告)日：2024-09-17
申请号：US17362443
申请日：2021-06-29
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Oswal , Raja Reddy Patukuri , Aravind Miriyala , Anand Hariraj Udupa , Hari Babu Tippana , Aatish Chandak
CPC classification number: H03F3/45475 , A61B5/308 , H03F2200/165
Abstract: An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.
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