公开(公告)号：US20250112114A1

公开(公告)日：2025-04-03

申请号：US18479000

申请日：2023-09-30

Applicant: Texas Instruments Incorporated

Inventor： Ninad Shahane ,  Vivek Arora ,  Kwang-Soo Kim

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: An example includes: a package substrate having a die pad with a device side surface and a thermal pad on an opposite side surface; a thermal dissipation structure mounted to the die pad, the thermal dissipation structure including a thermally conductive insulator core and thermal conductors on a device side surface and on a substrate mount surface opposite the device side surface; at least one semiconductor device die mounted to the device side surface of the thermal dissipation structure; electrical connections formed between leads on the package substrate and bond pads on the at least one semiconductor device die; and mold compound covering the electrical connections, the at least one semiconductor device, and portions of the package substrate, portions of the leads of the package substrate forming terminals, and the thermal pad exposed from the mold compound and forming a thermal pad for a semiconductor device package.

公开(公告)号：US20240332141A1

公开(公告)日：2024-10-03

申请号：US18194463

申请日：2023-03-31

Applicant: Texas Instruments Incorporated

Inventor： Kwang-Soo Kim ,  Makoto Shibuya ,  Woochan Kim

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373

CPC classification number: H01L23/49555 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3735 ,  H01L23/49562 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48137 ,  H01L2224/48175 ,  H01L2224/48472 ,  H01L2224/73265

Abstract: A semiconductor device includes: a package substrate having a device mount surface and on an opposite bottom side surface; at least one semiconductor die mounted on the device mount surface; and leads having a base portion attached to the device mount surface and having an internal portion extending away from a first bend at a first angle, the internal portion of the leads extending to a second bend, a remaining portion of the leads extending from the second bend and lying in a horizontal plane parallel to the device mount surface, the leads having a third bend in the remaining portion forming terminals extending at a second angle with respect to the horizontal plane of the remaining portion. Mold compound covers the device mount surface, portions of the leads, and the semiconductor die. The terminals are exposed at a board side surface of the mold compound.

公开(公告)号：US20240170359A1

公开(公告)日：2024-05-23

申请号：US17992990

申请日：2022-11-23

Applicant: Texas Instruments Incorporated

Inventor： Kwang-Soo Kim ,  Vivek Arora

IPC: H01L23/367 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L23/3672 ,  H01L21/4875 ,  H01L23/3121 ,  H01L23/49568 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/48175 ,  H01L2224/85007

Abstract: An electronic device includes a package structure, a lead, a heat slug, a semiconductor die, and a bond wire. The package structure has opposite first and second sides, and opposite third and fourth sides spaced along a first direction. The heat slug has a first portion partially exposed outside the second side of the package structure, and a second portion with slots extending inwardly along the first direction and fins between respective pairs of the slots, where the fins are enclosed by the package structure and spaced along an orthogonal second direction. The semiconductor die is attached to the heat slug, and the bond wire has a first end connected to the lead and a second end connected to a circuit of the semiconductor die.

公开(公告)号：US20230238350A1

公开(公告)日：2023-07-27

申请号：US17584562

申请日：2022-01-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Makoto Shibuya ,  Kwang-Soo Kim

IPC: H01L23/00

CPC classification number: H01L24/48 ,  H01L24/85 ,  H01L2224/4809 ,  H01L2224/48225 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1306 ,  H01L2924/30107

Abstract: An IC package includes an interconnect having a first platform and a second platform that are spaced apart. The IC package includes a die superposing a portion of the first platform of the interconnect. The die has a field effect transistor (FET), and a matrix of pads for the FET situated on a surface of the die. The matrix of pads having a row of source pads and a row of drain pads. A drain wire bond extends from a first drain pad to a second drain pad of the row of drain pads and to the first platform of the interconnect. A source wire bond extends from a first source pad to a second source pad of the row of source pads, back over the first source pad and is coupled to a connection region of the first platform.

公开(公告)号：US20250070101A1

公开(公告)日：2025-02-27

申请号：US18455558

申请日：2023-08-24

Applicant: Texas Instruments Incorporated

Inventor： Makoto Shibuya ,  Woochan Kim ,  Kwang-Soo Kim

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/495 ,  H01L23/52 ,  H01L25/00 ,  H05K1/18

Abstract: An electronic device includes a package structure, conductive leads, first and second semiconductor dies, and a metal clip, The package structure has opposite longitudinal ends, opposite lateral sides, a middle portion midway between the longitudinal ends, a first portion that extends between the middle portion and one longitudinal end, and a second portion that extends between the middle portion and the other longitudinal end. The metal clip extends in the package structure from the first portion to the second portion through the middle portion and electrically couples the first electronic component of the first semiconductor die to the second electronic component of the second semiconductor die.

公开(公告)号：US20240258288A1

公开(公告)日：2024-08-01

申请号：US18160818

申请日：2023-01-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Makoto Shibuya ,  Kwang-Soo Kim

IPC: H01L25/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L25/165 ,  H01L21/4825 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/4952 ,  H01L23/49555 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45541 ,  H01L2224/45624 ,  H01L2224/45647 ,  H01L2224/48245 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104

Abstract: In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

公开(公告)号：US20240120308A1

公开(公告)日：2024-04-11

申请号：US17960871

申请日：2022-10-06

Applicant: Texas Instruments Incorporated

Inventor： Kwang-Soo Kim ,  Makoto Shibuya ,  Woochan Kim ,  Vivek Arora

IPC: H01L23/00 ,  H01L25/16

CPC classification number: H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L24/84 ,  H01L25/16 ,  H01L2224/4001 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/4103 ,  H01L2224/41052 ,  H01L2224/41175 ,  H01L2224/48157 ,  H01L2224/73221 ,  H01L2224/84815 ,  H01L2924/1033 ,  H01L2924/1426 ,  H01L2924/19041 ,  H01L2924/30107

Abstract: An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.

公开(公告)号：US20230245942A1

公开(公告)日：2023-08-03

申请号：US17589761

申请日：2022-01-31

Applicant: Texas Instruments Incorporated

Inventor： Kwang-Soo Kim ,  Woochan Kim ,  Vivek Arora ,  Ken Pham

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48

CPC classification number: H01L23/34 ,  H01L23/49555 ,  H01L24/06 ,  H01L23/3107 ,  H01L21/4803 ,  H01L24/48 ,  H01L2224/06135 ,  H01L2224/48175

Abstract: A described example includes: a heat slug having a board side surface and an opposite top side surface; a package substrate mounted to the heat slug, the package substrate including overhanging leads extending over the board side surface of the heat slug, the package substrate having downset portions including a downset rail that runs along one side of a die mount area; at least one semiconductor device having a backside surface mounted to the board side surface of the heat slug; electrical connections coupling bond pads of the semiconductor device to the overhanging leads of the package substrate and to the downset rail; and mold compound covering the at least one semiconductor device, the electrical connections, a portion of the leads and the board side surface of the heat slug, the top side surface at least partially exposed from the mold compound.

公开(公告)号：US20250079268A1

公开(公告)日：2025-03-06

申请号：US18240614

申请日：2023-08-31

Applicant: Texas Instruments Incorporated

Inventor： Makoto Shibuya ,  Kwang-Soo Kim ,  Woochan Kim

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: An electronic device includes a first semiconductor die attached to a first conductive die attach pad and having a first electronic component, a second semiconductor die attached to a second conductive die attach pad and having a second electronic component, a first package structure that encloses the first semiconductor die and a portion of the first die attach pad, a second package structure that encloses the second semiconductor die and a portion of the second die attach pad, and a conductive metal structure that is electrically connected to the first and second electronic components and extends between the first and second package structures, the conductive metal structure exposed outside the first and second package structures.

公开(公告)号：US20240250075A1

公开(公告)日：2024-07-25

申请号：US18156449

申请日：2023-01-19

Applicant: Texas Instruments Incorporated

Inventor： Makoto Shibuya ,  Kwang-Soo Kim

IPC: H01L25/16 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/538

CPC classification number: H01L25/16 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/5383 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/48175 ,  H01L2224/73265 ,  H01L2224/83815 ,  H01L2224/85 ,  H01L2224/92247

Abstract: An electronic device includes a semiconductor die attached to a substrate and coupled to a circuit of the electronic device, an electronic component coupled to the circuit, and a package structure that encloses the semiconductor die, the package structure having an opening that exposes a portion of the electronic component. A method includes attaching a semiconductor die to a substrate or a die attach pad, performing an electrical connection process that couples the semiconductor die to a circuit, forming a package structure that encloses the semiconductor die and having an opening that exposes a metal terminal attached to the substrate, and attaching an electronic component through the opening to the metal terminal.