公开(公告)号：US06381449B1

公开(公告)日：2002-04-30

申请号：US09337525

申请日：1999-06-22

申请人： Takafumi Yamaji ,  Tetsuro Itakura ,  Hiroshi Tanimoto

发明人： Takafumi Yamaji ,  Tetsuro Itakura ,  Hiroshi Tanimoto

IPC分类号： H04B126

CPC分类号： H03D7/1433 ,  H03D7/1425 ,  H03D2200/0084 ,  H03D2200/0088

摘要： A frequency converter including a mixer circuit which inputs a local oscillation signal and a radio-frequency input signal modulated for communication of information, and performs frequency conversion. A buffer amplifier is higher than a desired signal frequency band, and has a low-pass passage characteristic of cut-off frequency lower than an adjacent channel carrier frequency.

摘要翻译： 一种变频器，包括输入本地振荡信号的混频电路和用于信息通信调制的射频输入信号，并进行频率转换。 缓冲放大器高于期望的信号频带，并且具有低于相邻信道载波频率的截止频率的低通通道特性。

公开(公告)号：US06498929B1

公开(公告)日：2002-12-24

申请号：US08880679

申请日：1997-06-23

申请人： Hiroshi Tsurumi ,  Hiroshi Yoshida ,  Tetsuro Itakura ,  Takafumi Yamaji ,  Akira Yasuda ,  Takashi Ueno ,  Hiroshi Tanimoto ,  Ryuichi Fujimoto ,  Hiroshi Horiguchi

发明人： Hiroshi Tsurumi ,  Hiroshi Yoshida ,  Tetsuro Itakura ,  Takafumi Yamaji ,  Akira Yasuda ,  Takashi Ueno ,  Hiroshi Tanimoto ,  Ryuichi Fujimoto ,  Hiroshi Horiguchi

IPC分类号： H04B716

CPC分类号： H03D3/008 ,  H03G3/3052 ,  H04B1/30

摘要： A receiver having a function of a direct current offset, and including a receiving section for receiving a radio frequency signal, an analog signal processing section for amplifying, band-converting and frequency-converting an analog signal inputted from the receiving section, and an AD converting section for converting an output of the analog signal processing section from an analog signal to a digital signal. Also included is a digital signal processing section for processing the digital signal converted by the DC converting section. The receiver further includes an offset detecting element, provided in the digital signal processing section, for detecting a direct current offset signal produced in the receiving section or a frequency converting section, an offset holding element, provided in the digital signal processing section, for holding the direct current offset signal detected by the offset detecting element, a DA converting section for converting the direct current offset signal detected by the digital signal processing section into an analog signal, and a first offset correcting element, provided in the analog signal processing section, for correcting the analog signal on the basis of the direct current offset signal converted by the DA converting section into the analog signal.

摘要翻译： 具有直流偏移功能的接收机，包括用于接收射频信号的接收部分，用于放大从接收部分输入的模拟信号的频带转换和频率转换的模拟信号处理部分，以及AD 转换部分，用于将模拟信号处理部分的输出从模拟信号转换成数字信号。 还包括用于处理由DC转换部分转换的数字信号的数字信号处理部分。 接收机还包括偏移检测元件，设置在数字信号处理部分中，用于检测在数字信号处理部分中设置的接收部分或频率转换部分产生的直流偏移信号，偏移保持元件，用于保持 由偏移检测元件检测的直流偏移信号，用于将由数字信号处理部分检测的直流偏移信号转换为模拟信号的DA转换部分和设置在模拟信号处理部分中的第一偏移校正元件， 用于基于由DA转换部分转换成的模拟信号的直流偏移信号来校正模拟信号。

公开(公告)号：US5995819A

公开(公告)日：1999-11-30

申请号：US755468

申请日：1996-11-22

申请人： Takafumi Yamaji ,  Osamu Watanabe ,  Hiroshi Tanimoto ,  Tetsuro Itakura ,  Shoji Otaka ,  Ryuichi Fujimoto

发明人： Takafumi Yamaji ,  Osamu Watanabe ,  Hiroshi Tanimoto ,  Tetsuro Itakura ,  Shoji Otaka ,  Ryuichi Fujimoto

IPC分类号： H03D7/00 ,  H03D7/14 ,  H04B1/00

CPC分类号： H03F3/45085 ,  H03D7/00 ,  H03D7/1408 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1475 ,  H03D2200/0007 ,  H03D2200/0025 ,  H03D2200/0047 ,  H03D2200/009

摘要： A frequency converter includes: a signal synthesizer element for inputting first and second input signals to synthesize these signals and for outputting a synthesized signal, from which noises even times as large as the frequency of the second input signal are removed; an amplitude limitation amplifier element, composed of a differential amplifier circuit, for amplifying the synthesized signal outputted from the signal synthesizer element to output an amplified signal having a constant amplitude; and a filter for inputting the amplified signal outputted from the amplitude limitation amplifier element, to remove an unnecessary signal component to produce an output a baseband signal including only a desired signal component. In addition, a radio receiver using the frequency converter of such a construction is designed to input the output of a local oscillator to a variable attenuator or a variable gain amplifier, to input the output of the variable attenuator or the variable gain amplifier as the first input signal to the frequency converter so as to perform the gain control. Thus, not only is self-mixing, a common problem in direct conversion receivers, prevented, but also, because a smaller local oscillation driving signal is required, power consumption is significantly reduced.

摘要翻译： 一种频率转换器，包括：信号合成器元件，用于输入第一和第二输入信号以合成这些信号并输出​​合成信号，从该信号合成信号除去除了第二输入信号的频率以上的噪声; 幅度限制放大器元件，由差分放大电路组成，用于放大从信号合成器元件输出的合成信号，以输出具有恒定幅度的放大信号; 以及滤波器，用于输入从幅度限制放大器元件输出的放大信号，以去除不必要的信号分量以产生仅包括所需信号分量的基带信号。 此外，使用这种结构的变频器的无线电接收机被设计成将本地振荡器的输出输入到可变衰减器或可变增益放大器，以将可变衰减器或可变增益放大器的输出作为第一 输入到变频器的信号，以进行增益控制。 因此，不仅自发混合，直接转换接收器中的常见问题被阻止，而且由于需要较小的本地振荡驱动信号，所以功耗显着降低。

公开(公告)号：US07884749B2

公开(公告)日：2011-02-08

申请号：US12349180

申请日：2009-01-06

申请人： Masanori Furuta ,  Tomohiko Ito ,  Takafumi Yamaji ,  Tetsuro Itakura

发明人： Masanori Furuta ,  Tomohiko Ito ,  Takafumi Yamaji ,  Tetsuro Itakura

IPC分类号： H03M1/38

CPC分类号： H03M1/1215 ,  H03M1/162 ,  H03M1/164 ,  H03M1/468

摘要： An A/D converting apparatus includes a first A/D converter to sample an analog input signal having a D/A converter to generate a comparative signal for successive comparison with the analog input signal, a signal generator generate a differential signal between the analog input signal and the comparative signal, and a comparator to compare the comparative signal with a standard value to generate a first digital signal exhibiting high-order bit; an amplifier to amplify the differential signal to generate a residue signal; and a second A/D converter to sample the residue signal to generate a second digital signal exhibiting low-order bit.

摘要翻译： A / D转换装置包括：第一A / D转换器，对具有D / A转换器的模拟输入信号进行采样以产生用于与模拟输入信号连续比较的比较信号，信号发生器在模拟输入端之间产生差分信号 信号和比较信号，以及比较器，用于将比较信号与标准值进行比较，以产生呈现高位的第一数字信号; 放大器，用于放大差分信号以产生残余信号; 以及第二A / D转换器，用于对残留信号进行采样以产生呈现低阶位的第二数字信号。

公开(公告)号：US07414468B2

公开(公告)日：2008-08-19

申请号：US11928766

申请日：2007-10-30

申请人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

发明人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

IPC分类号： H03F3/45

CPC分类号： H03F3/193 ,  H03F3/45085 ,  H03F3/45183 ,  H03F2203/45352

摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

摘要翻译： 放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值 通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差值和放大的平均值的和的第一输出信号，对应于放大的第二差值和放大的平均值之和的第二输出信号， 以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

公开(公告)号：US20080064359A1

公开(公告)日：2008-03-13

申请号：US11928766

申请日：2007-10-30

申请人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

发明人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

IPC分类号： H04Q7/20 ,  H03F3/45 ,  H03K9/00 ,  H04B1/02 ,  H04B1/10 ,  H04L27/00

CPC分类号： H03F3/193 ,  H03F3/45085 ,  H03F3/45183 ,  H03F2203/45352

摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

摘要翻译： 放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值 通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差和放大的平均的和的第一输出信号，对应于放大的第二差和放大的平均之和的第二输出信号， 以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

公开(公告)号：US07236118B2

公开(公告)日：2007-06-26

申请号：US11409569

申请日：2006-04-24

申请人： Daisuke Kurose ,  Takafumi Yamaji ,  Tetsuro Itakura

发明人： Daisuke Kurose ,  Takafumi Yamaji ,  Tetsuro Itakura

IPC分类号： H03M1/38

CPC分类号： H03M1/123 ,  H03M1/0695 ,  H03M1/1205 ,  H03M1/44

摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

公开(公告)号：US20070024359A1

公开(公告)日：2007-02-01

申请号：US11387317

申请日：2006-03-23

申请人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

发明人： Takafumi Yamaji ,  Rui Ito ,  Tetsuro Itakura

IPC分类号： H03F3/45

CPC分类号： H03F3/193 ,  H03F3/45085 ,  H03F3/45183 ,  H03F2203/45352

摘要： An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

摘要翻译： 放大器包括放大单元，其放大第一和第二输入信号之间的第一差值，第二和第三输入信号之间的第二差值以及第三和第一输入信号之间的差分模式增益的第三差值，并放大第一和第二输入信号的平均值 通过共模增益输出第二和第三输入信号，用于输出对应于放大的第一差和放大的平均的和的第一输出信号，对应于放大的第二差和放大的平均之和的第二输出信号， 以及对应于放大的第三差和放大的平均值之和的第三输出信号; 第一秒; 以及减小电路，其减小小于差分模式增益的共模增益。

公开(公告)号：US20060187107A1

公开(公告)日：2006-08-24

申请号：US11409569

申请日：2006-04-24

申请人： Daisuke Kurose ,  Takafumi Yamaji ,  Tetsuro Itakura

发明人： Daisuke Kurose ,  Takafumi Yamaji ,  Tetsuro Itakura

IPC分类号： H03M1/12

CPC分类号： H03M1/123 ,  H03M1/0695 ,  H03M1/1205 ,  H03M1/44

摘要： A multiple input AD conversion apparatus includes a first unit AD converter including a plurality of first conversion stages connected in cascade to convert a first analog input signal to a first digital output signal, a second unit AD converter including a plurality of second conversion stages connected in cascade to convert a second analog input signal to a second digital output signal, and an operational amplifier shared between the first conversion stage and the second conversion stage in a time sharing.

公开(公告)号：US20050285673A1

公开(公告)日：2005-12-29

申请号：US11216100

申请日：2005-09-01

申请人： Tetsuro Itakura ,  Takafumi Yamaji

发明人： Tetsuro Itakura ,  Takafumi Yamaji

IPC分类号： G11C27/02 ,  H03F3/45 ,  H03F3/68

CPC分类号： H03F3/45475 ,  G11C27/024 ,  G11C27/026 ,  H03F3/45632 ,  H03F3/45928 ,  H03F3/45977 ,  H03F2203/45101 ,  H03F2203/45138 ,  H03F2203/45428 ,  H03F2203/45574 ,  H03H11/1243 ,  H03H11/32

摘要： An operational amplifier circuit is constituted by first and second inverted amplifier circuits (A1, A2) that receive first and second input signals, a third inverted amplifier circuit (A3) that receives an estimated common-mode output signal and an output signal from the first inverted amplifier circuit and outputs first and second output signals, a fourth inverted amplifier circuit (A4) that receives the estimated common-mode output signal and an output signal from the second inverted amplifier circuit and outputs third and fourth output signals, where the estimated common-mode output signal is generated by adding the second output signal and the fourth output signal, and first and second non-inverted amplifier circuits (A5, A6) that receive the estimated common-mode output signal and feed it back to the first and second inverted amplifier circuits.

摘要翻译： 运算放大器电路由接收第一和第二输入信号的第一和第二反相放大器电路（A 1，A 2）构成，第三反相放大器电路（A 3），其接收估计的共模输出信号和输出信号 从第一反相放大器电路输出第一和第二输出信号;第四反相放大电路（A 4），其接收估计的共模输出信号和来自第二反相放大器电路的输出信号，并输出第三和第四输出信号; 其中通过将第二输出信号和第四输出信号相加来产生估计的共模输出信号，以及接收估计的共模输出信号并将其馈送的第一和第二非反相放大器电路（A 5，A 6） 回到第一和第二反相放大器电路。