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    Method of oxidizing a silicon substrate and method of forming an oxide layer using the same
    1.
    发明授权
    Method of oxidizing a silicon substrate and method of forming an oxide layer using the same 有权
    氧化硅衬底的方法和使用其形成氧化物层的方法

    公开(公告)号：US07119029B2

    公开(公告)日：2006-10-10

    申请号：US10839501

    申请日：2004-05-05

    申请人： Won-Sik Shin ,  Ki-Hyun Hwang ,  Jung-Hwan Oh ,  Hyeon-Deok Lee ,  Seok-Woo Nam

    发明人： Won-Sik Shin ,  Ki-Hyun Hwang ,  Jung-Hwan Oh ,  Hyeon-Deok Lee ,  Seok-Woo Nam

    IPC分类号： H01L23/48

    CPC分类号： H01L21/02238 ,  C23C8/12 ,  C23C8/28 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/3144

    摘要： In a method of forming an oxide layer, ozone is generated by reacting an oxygen gas having a first flow rate with a nitrogen gas having a second flow rate of more than about 1% of the first flow rate. A reactant including the ozone and nitrogen is provided onto a silicon substrate. A surface of the silicon substrate is oxidized via the reaction of the reactant with silicon in the silicon substrate. The flow rate of the nitrogen gas is increased while ozone serving as an oxidant is formed by reacting the nitrogen gas with the oxygen gas. Thus, the oxide layer or a metal oxide layer including nitrogen may be rapidly formed on the substrate.

    摘要翻译： 在形成氧化物层的方法中，通过使具有第一流量的氧气与具有大于第一流量的约1％的第二流量的氮气反应来生成臭氧。 将包含臭氧和氮的反应物提供到硅衬底上。 硅衬底的表面通过反应物与硅衬底中的硅的反应被氧化。 通过使氮气与氧气反应而形成臭氧作为氧化剂，氮气的流量增加。 因此，可以在衬底上快速形成包含氮的氧化物层或金属氧化物层。

    Method of manufacturing a hemisperical grain silicon layer and method of manufacturing a semiconductor device using the same
    6.
    发明申请
    Method of manufacturing a hemisperical grain silicon layer and method of manufacturing a semiconductor device using the same 审中-公开
    制造半晶粒硅层的方法及使用其制造半导体器件的方法

    公开(公告)号：US20060160337A1

    公开(公告)日：2006-07-20

    申请号：US11323999

    申请日：2005-12-29

    申请人： Young-Jin Kim ,  Hyeon-Deok Lee ,  Seok-Woo Nam ,  Yong-Jae Lee ,  Hyun-Seok Lim ,  Wan-Goo Hwang ,  Jin-Il Lee ,  Jung-Hwan Oh

    发明人： Young-Jin Kim ,  Hyeon-Deok Lee ,  Seok-Woo Nam ,  Yong-Jae Lee ,  Hyun-Seok Lim ,  Wan-Goo Hwang ,  Jin-Il Lee ,  Jung-Hwan Oh

    IPC分类号： H01L21/20 ,  H01L21/36

    CPC分类号： H01L28/84 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/91

    摘要： In a method of manufacturing a capacitor including a hemispherical grain (HSG) silicon layer, after forming a storage electrode electrically coupled to a contact region of a substrate, the HSG silicon layer is formed on the storage electrode by providing a first gas including silicon and a second gas onto a surface of the storage electrode with a volume ratio of about 1.0:0.1 to about 1.0:5.0. A dielectric layer and a plate electrode are sequentially formed on the HSG silicon layer. A grain size of the HSG silicon layer may be easily adjusted and abnormal growths of the HSG at a lower portion of the storage electrode may be suppressed. Therefore, the HSG silicon layer may be uniformly formed on the storage electrode, and a structural stability of the storage electrode may be improved to prevent electrical defects of the capacitor.

    摘要翻译： 在制造包括半球形晶粒（HSG）硅层的电容器的方法中，在形成与基板的接触区域电耦合的存储电极之后，通过提供包括硅的第一气体和存储电极形成HSG硅层， 第二气体以约1.0:0.1至约1.0:5.0的体积比存储在存储电极的表面上。 在HSG硅层上依次形成电介质层和平板电极。 可以容易地调节HSG硅层的晶粒尺寸，并且可以抑制存储电极下部的HSG的异常生长。 因此，HSG硅层可以均匀地形成在存储电极上，并且可以改善存储电极的结构稳定性，以防止电容器的电缺陷。

    Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same
    10.
    发明授权
    Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same 有权
    嵌入式栅电极及其形成方法以及具有凹陷栅电极的半导体器件及其制造方法

    公开(公告)号：US07563677B2

    公开(公告)日：2009-07-21

    申请号：US11531239

    申请日：2006-09-12

    申请人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung Kim ,  Jung-Hwan Oh ,  Young-Sub You

    发明人： Dae-Han Yoo ,  Kong-Soo Lee ,  Chang-Hoon Lee ,  Yong-Woo Hyung ,  Hyeon-Deok Lee ,  Hyo-Jung Kim ,  Jung-Hwan Oh ,  Young-Sub You

    IPC分类号： H01L21/336

    CPC分类号： H01L27/10894 ,  H01L27/10876 ,  H01L29/4236 ,  H01L29/66621

    摘要： A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess. A gate dielectric layer is formed on a top surface of the substrate and on an inner surface of the first and second recesses. A first polysilicon layer fills the first recess and is doped with impurities at a first impurity density. A second polysilicon layer fills the second recess and is doped with the impurities at a second impurity density. A void is defined within the second polysilicon layer. A third polysilicon layer is formed on the gate dielectric and first polysilicon layers and is doped with the impurities at a third impurity density. Due to impurities in the second polysilicon layer, migration of the void within the second recess may be substantially prevented.

    摘要翻译： 凹陷栅极电极结构包括第一凹部和与形成在基板中的第一凹部连通的第二凹部。 第二凹部比第一凹部大。 栅极电介质层形成在基板的顶表面上和第一凹槽和第二凹槽的内表面上。 第一多晶硅层填充第一凹槽并以第一杂质密度掺杂杂质。 第二多晶硅层填充第二凹槽，并以第二杂质密度掺杂杂质。 在第二多晶硅层内限定空隙。 在栅极电介质和第一多晶硅层上形成第三多晶硅层，并以第三杂质密度掺杂杂质。 由于第二多晶硅层中的杂质，可以基本上防止第二凹陷内的空隙的迁移。