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公开(公告)号：US20240356505A1
公开(公告)日：2024-10-24
申请号：US18629498
申请日：2024-04-08
发明人： SHIH-HSIUNG HUANG
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F2203/45631
摘要： The present application discloses an amplifier and a method for controlling the same. The amplifier includes a first P-type transistor, a second P-type transistor, a first N-type transistor and a second N-type transistor. At a first amplification stage, an AC component of a first input signal is amplified into a first amplified signal at a drain of the first P-type transistor. The second P-type transistor then amplifies the first amplified signal and an AC component of a second input signal and outputs at an output terminal.
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公开(公告)号：US12126353B2
公开(公告)日：2024-10-22
申请号：US17945136
申请日：2022-09-15
发明人： Wei-Cian Hong
CPC分类号： H03M1/34 , H03M1/0863 , H03M1/462 , H03M1/468
摘要： The present invention discloses an analog-to-digital conversion circuit having quick tracking mechanism is provided. A positive and a negative capacitor arrays receive a positive and a negative input voltages and output a positive and a negative output voltages. A first and a second comparators performs comparison thereon respectively according to and not according to a reference voltage to generate a first and a second comparison results. A control circuit does not perform level-shifting when a difference between the positive and the negative output voltages is not within a predetermined range. The control circuit assigns the positive and the negative capacitor arrays a voltage up-tracking direction and a voltage down-tracking direction respectively to switch a capacitor enabling combination with digital codes according to the second comparison result, and outputs the digital codes as a digital output signal when the positive and the negative output voltages equal.
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公开(公告)号：US12113587B2
公开(公告)日：2024-10-08
申请号：US17506725
申请日：2021-10-21
发明人： Hsuan-Ting Ho , Liang-Wei Huang , Wei-Chiang Hsu , Wei-Jyun Wang
CPC分类号： H04B3/23 , H03M1/001 , H03M1/0854
摘要： A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.
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公开(公告)号：US12113544B2
公开(公告)日：2024-10-08
申请号：US17864464
申请日：2022-07-14
发明人： Sheng-Yen Shih , Shih-Hsiung Huang , Wei-Cian Hong
CPC分类号： H03M1/38 , H03M1/1245 , H03M3/04
摘要： A method of converting a single-ended signal to a differential-ended signal includes the following steps: providing a first sampling capacitor having a first end and a second end; providing a second sampling capacitor having a third end and a fourth end; at a first time point, controlling the first end to receive a single-ended signal, controlling the second end to receive a reference voltage, controlling the third end to receive the reference voltage or a middle voltage value of the swing of the single-ended signal, and controlling the fourth end to receive the single-ended signal; and at a second time point, controlling the second end and the fourth end to receive the reference voltage. The first end and the third end output a differential signal after the second time point which is later than the first time point.
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公开(公告)号：US12113441B2
公开(公告)日：2024-10-08
申请号：US18175490
申请日：2023-02-27
发明人： Chien Sheng Chen
CPC分类号： H02M3/155
摘要： A power source equipment is configured to provide a power to a powered device in a power over Ethernet. The power source equipment includes a first port, a second port, and a control circuit. The first port is configured to perform a power classification on the powered device, and provide a first voltage to the powered device in a first stage. The second port is configured to provide a second voltage to the powered device in a second stage. The control circuit is configured to disable the second port in the first stage, and configured to control the second port to output the second voltage and increase the first voltage in the second stage.
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公开(公告)号：US12112875B2
公开(公告)日：2024-10-08
申请号：US17236215
申请日：2021-04-21
发明人： Hsiao-Tsung Yen , Ka-Un Chan
CPC分类号： H01F27/006 , H01F27/2804 , H01F27/29 , H01L28/10 , H01F2027/2819
摘要： An integrated circuit includes a first coil and a second coil. The first coil is disposed on the first side of the integrated circuit. The second coil is disposed on the second side of the integrated circuit, and is partially overlapped with the first coil at a junction. The first coil is not interlaced with the second coil at the junction.
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公开(公告)号：US20240329678A1
公开(公告)日：2024-10-03
申请号：US18607606
申请日：2024-03-18
发明人： YEN-PO LAI , Chih-Lung Chen , Yi Feng
摘要： The present disclosure discloses a low dropout regulator apparatus having noise-suppression mechanism. An operational amplifier circuit includes a differential input circuit, an amplifying output circuit and a first and a second resistive components. The differential input circuit is coupled between first connection nodes and a ground terminal to receive a reference voltage and a feedback voltage. The amplifying output circuit includes a first and a second transistor pair circuits. The first transistor pair circuit is coupled between a power supply and second connection nodes. The second transistor pair is coupled between the second connection nodes and the ground terminal and has an amplifying output terminal generating an amplified voltage. The first and the second resistive components are coupled between the first and the second connection nodes. A voltage stabilizing output circuit receives the amplified voltage to generate an output voltage and generates the feedback voltage according to a division thereof.
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公开(公告)号：US12105660B2
公开(公告)日：2024-10-01
申请号：US18143092
申请日：2023-05-04
发明人： Yang Li
CPC分类号： G06F13/4072 , G06F13/385
摘要： The present invention discloses a communication method having both defined and undefined bus communication mechanism used in an electronic that includes steps outlined below. A connection between an application program and the peripheral electronic equipment is established through a built-in driver. A proxy library and a proxy driver respectively corresponding to a user mode and a kernel mode are activated by the application program. A connection between a combination of the proxy library and the proxy driver and the peripheral electronic equipment are established by the application program. Defined commands defined by the built-in driver are transmitted to and received from the peripheral electronic equipment through a bus by the application program by using the built-in driver. Non-defined commands not defined by the built-in driver are transmitted to and received from the peripheral electronic equipment through the bus by the application program by using the proxy library and the proxy driver.
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公开(公告)号：US12105142B2
公开(公告)日：2024-10-01
申请号：US17659012
申请日：2022-04-13
发明人： Min-Hsu Tsai , Ruey-Beei Wu
IPC分类号： G01V3/10 , G01R31/317 , H01Q7/00 , H04B5/73
CPC分类号： G01R31/31702 , H01Q7/00 , H04B5/73
摘要： The present disclosure provides a method and system for creating dipole moment model. The method is applied to a tested circuit and includes: performing a near-field measurement on the tested circuit, to obtain a near-field electric field and a near-field magnetic field related to the tested circuit; performing a two-dimensional divergence calculation on the near-field electric field and the near-field magnetic field, to obtain a near-field electric divergence field and a near-field magnetic divergence field; performing a convolution calculation on the near-field electric divergence field and the near-field magnetic divergence field with a digital filter; and building a dipole moment matrix equivalent to the tested circuit according to a result of the convolution calculation.
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公开(公告)号：US12088359B2
公开(公告)日：2024-09-10
申请号：US17938050
申请日：2022-10-05
发明人： Shih-Chang Chen , Chih-Wei Chang , Chun-Chi Yu
IPC分类号： H04B17/345
CPC分类号： H04B17/345
摘要： An eye diagram measuring method includes: sampling a compensated input signal according to a reference voltage and a reference clock to obtain a first sampling result; and sampling a to-be-compensated input signal according to a scan voltage and a scan clock to obtain a second sampling result, including: (b1) storing a minimum phase and a voltage level which render the first sampling result identical to the second sampling result; (b2) increasing the voltage level and repeating operation (b1); (b3) decreasing the voltage level and repeating operation (b1); (b4) storing a maximum phase and the voltage level which render the first sampling result identical to the second sampling result; (b5) increasing the voltage level and repeating operation (b4); and (b6) decreasing the voltage level and repeating operation (b4). Voltage levels, maximum phases and minimum phases that are stored are for adjusting the reference voltage and the reference clock.
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