公开(公告)号：US20100177413A1

公开(公告)日：2010-07-15

申请号：US12352802

申请日：2009-01-13

Applicant: Jin-Woo Lee ,  Jihan Ryu ,  Kwang-Keun Shin ,  Bakhtiar Brian Litkouhi

Inventor： Jin-Woo Lee ,  Jihan Ryu ,  Kwang-Keun Shin ,  Bakhtiar Brian Litkouhi

IPC: G02B5/08

CPC classification number: B60R1/072 ,  B60R1/025

Abstract: Systems and methods for automatically adjusting the orientation of one or more mirrors present on a motorized vehicle are responsive to the spatial position of at least one component of a driver seat present in such motorized vehicle.

Abstract translation: 用于自动调节存在于机动车辆上的一个或多个镜子的方向的系统和方法响应于在这种机动车辆中存在的驾驶员座椅的至少一个部件的空间位置。

公开(公告)号：US20100102385A1

公开(公告)日：2010-04-29

申请号：US12652970

申请日：2010-01-06

Applicant: Jin-Woo Lee ,  Tae-Young Chung ,  Sung-Hee Han

Inventor： Jin-Woo Lee ,  Tae-Young Chung ,  Sung-Hee Han

IPC: H01L29/78

CPC classification number: H01L29/78 ,  H01L21/823437 ,  H01L21/823481 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66621

Abstract: Semiconductor devices including an isolation layer on a semiconductor substrate are provided. The isolation layer defines an active region of the semiconductor substrate. The device further includes an upper gate electrode crossing over the active region and extending to the isolation layer and lower active gate electrode. The lower active gate electrode includes a first active gate electrode extending from the upper gate electrode to the active region and a second active gate electrode below the first active gate electrode and having a greater width than a width of the first active gate electrode. The device further includes a lower field gate electrode that extends from the upper gate electrode to the isolation layer and has a bottom surface that is at a lower level than a bottom surface of the active gate electrode such that the sidewalls of the active region are covered below the lower active gate electrode. Related methods of fabricating semiconductor devices are also provided herein.

Abstract translation: 提供包括半导体衬底上的隔离层的半导体器件。 隔离层限定半导体衬底的有源区。 该器件还包括与有源区交叉并延伸到隔离层和下活性栅电极的上栅电极。 下有源栅电极包括从上栅极延伸到有源区的第一有源栅电极和位于第一有源栅电极下方并且具有比第一有源栅电极的宽度更大的宽度的第二有源栅电极。 该器件还包括一个从上部栅电极延伸到隔离层的下部栅极电极，并且具有一底部表面，该底表面处于与该有源栅极电极的底表面相比较低的位置，使得该有源区域的侧壁被覆盖 在下部有源栅电极下方。 本文还提供了制造半导体器件的相关方法。

公开(公告)号：US20100082195A1

公开(公告)日：2010-04-01

申请号：US12630113

申请日：2009-12-03

Applicant: Jin-Woo Lee ,  Bakhtiar Brian Litkouhi

Inventor： Jin-Woo Lee ,  Bakhtiar Brian Litkouhi

IPC: G05D1/00 ,  B60W30/16 ,  B62D6/00

CPC classification number: B62D15/025 ,  B62D15/0255 ,  G01C21/12

Abstract: A vehicle includes a vehicle monitoring system for estimating vehicle motion states, a spatial monitoring system, an adaptive cruise control system for vehicle speed and acceleration control, a steering controller for vehicle lateral motion control, a roadway estimator, and an autonomic control system. Commanded vehicle operation is adjusted to achieve a preferred travel path based upon a predicted travel path and an estimated roadway. The preferred travel path is adapted responsive to the estimated roadway.

Abstract translation: 车辆包括用于估计车辆运动状态的车辆监控系统，空间监视系统，用于车辆速度和加速度控制的自适应巡航控制系统，用于车辆横向运动控制的转向控制器，道路估计器和自主控制系统。 基于所预测的行驶路径和估计的道路，调整指令车辆的行驶以实现优选的行驶路径。 优选的行进路径适应于估计的道路。

公开(公告)号：US20100062520A1

公开(公告)日：2010-03-11

申请号：US10582529

申请日：2004-12-10

Applicant: Jin-Woo Lee

Inventor： Jin-Woo Lee

IPC: C12M1/34 ,  H01R43/00

CPC classification number: G01N33/5438 ,  G01N21/253 ,  G01N21/78 ,  G01N27/3272 ,  G01N2021/7783 ,  Y10T29/49208

Abstract: A method of producing a biomaterial measuring device is disclosed. The method includes forming a plurality of reactions elements, to which an assay reagent is applied, on a first substrate, cutting the resulting first substrate in a unit of individual reaction element, and attaching a first substrate piece, which is formed by cutting the resulting first substrate in the unit of individual reaction element, to a predetermined portion of a second substrate. In the biomaterial measuring device, since a material cost in minimized and it is easy to automate production, it is possible to reduce a production, it is possible to reduce a production cost.

Abstract translation: 公开了一种制造生物材料测量装置的方法。 该方法包括在第一基板上形成多个反应元件，将测定试剂施加到其上，以单个反应元件为单位切割得到的第一基板，并且通过切割所形成的第一基板 单个反应元件单元中的第一衬底到第二衬底的预定部分。 在生物材料测量装置中，由于最小化材料成本并且易于自动化生产，因此可以减少生产，可以降低生产成本。

公开(公告)号：US07665801B2

公开(公告)日：2010-02-23

申请号：US11481286

申请日：2006-07-05

Applicant: Jin Woo Lee

Inventor： Jin Woo Lee

IPC: B62D33/06

CPC classification number: E02F9/08 ,  E02F9/163

Abstract: A structure of an upper frame for supporting a cabin of construction machinery, whereby, in the event of a rollover accident, an excessive vertical load or rearward load applied to a cabin structure is primarily dispersed by a reinforcing member of the cabin structure, and the dispersed load is supported by a separate cabin supporting structure, so that the plastic deformation of the cabin structure can be minimized.

Abstract translation: 用于支撑工程机械舱的上框架的结构，由此，在翻车事故的情况下，施加到舱室结构的过大的垂直载荷或向后的载荷主要由舱室结构的加强构件分散，并且 分散载荷由独立的舱室支撑结构支撑，使得舱室结构的塑性变形可以最小化。

公开(公告)号：US07602043B2

公开(公告)日：2009-10-13

申请号：US11461344

申请日：2006-07-31

Applicant: Eun-Cheol Lee ,  Won-Suk Yang ,  Jin-Woo Lee ,  Tae-Young Chung

Inventor： Eun-Cheol Lee ,  Won-Suk Yang ,  Jin-Woo Lee ,  Tae-Young Chung

IPC: H01L27/06 ,  H01L27/08

CPC classification number: H01L28/91 ,  G11C11/4091

Abstract: A coupling capacitor and a semiconductor memory device using the same are provided. In an embodiment, each memory cell of the semiconductor memory device includes a coupling capacitor so that a storage capacitor can store at least 2 bits of data. The coupling capacitor has a capacitance having a predetermined ratio with respect to the capacitance of the storage capacitor. For this, the coupling capacitor is formed by substantially the same fabrication process as the storage capacitor. The predetermined ratio is obtained by choosing an appropriate number of individual capacitors, each with the same capacitance of the storage capacitor, to comprise the coupling capacitor. Also, the coupling capacitor is disposed on an interlayer insulating layer that buries a bit line in a cell region and a sense amplifier in a sense amplifier region.

Abstract translation: 提供耦合电容器和使用该耦合电容器的半导体存储器件。 在一个实施例中，半导体存储器件的每个存储单元包括耦合电容器，使得存储电容器可以存储至少2位的数据。 耦合电容器具有相对于存储电容器的电容具有预定比率的电容。 为此，耦合电容器通过与存储电容器基本上相同的制造工艺来形成。 通过选择适当数量的各个具有相同电容的存储电容器的单个电容器来获得预定比率，以包括耦合电容器。 此外，耦合电容器设置在掩埋单元区域中的位线和读出放大器区域中的读出放大器的层间绝缘层上。

公开(公告)号：US20090152625A1

公开(公告)日：2009-06-18

申请号：US12314582

申请日：2008-12-12

Applicant: Jin-Woo Lee ,  Tae-Young Chung ,  Joo-Young Lee

Inventor： Jin-Woo Lee ,  Tae-Young Chung ,  Joo-Young Lee

IPC: H01L29/78

CPC classification number: H01L29/66621 ,  H01L21/26513 ,  H01L21/823412 ,  H01L21/823437 ,  H01L29/1037 ,  H01L29/105 ,  H01L29/4236

Abstract: A recessed channel transistor includes a single crystalline silicon substrate having a recessed portion, a bottom surface of the recessed portion including an elevated central portion, a channel doping region in the single crystalline silicon substrate, the channel doping region being under the bottom surface of the recessed portion, a gate structure in the recessed portion, and source/drain regions in the single crystalline silicon substrate at both sides of the recessed portion, the source/drain regions being spaced apart from the bottom surface of the recessed portion.

Abstract translation: 凹陷沟道晶体管包括具有凹陷部分的单晶硅衬底，凹部的底表面包括升高的中心部分，在单晶硅衬底中的沟道掺杂区域，沟道掺杂区域位于 凹陷部分，凹陷部分中的栅极结构以及在凹陷部分两侧的单晶硅衬底中的源极/漏极区域，源极/漏极区域与凹陷部分的底表面间隔开。

公开(公告)号：US20090127609A1

公开(公告)日：2009-05-21

申请号：US12232020

申请日：2008-09-10

Applicant: Sung-Hee Han ,  Jin-Woo Lee ,  Tae-Young Chung ,  Ja-Young Lee

Inventor： Sung-Hee Han ,  Jin-Woo Lee ,  Tae-Young Chung ,  Ja-Young Lee

IPC: H01L29/78 ,  H01L21/3205

CPC classification number: H01L21/3247 ,  H01L29/1037 ,  H01L29/42376 ,  H01L29/66553 ,  H01L29/66621 ,  H01L29/78

Abstract: Provided are a method of fabricating a recess channel transistor and a related semiconductor device. The method may include forming a first gate trench on a substrate, forming a dielectric spacer on a sidewall of the first gate trench, forming a second gate trench on the substrate under the first gate trench, and forming a gate electrode to fill the trenches. The dielectric spacer may remain between the gate electrode and the substrate.

Abstract translation: 提供一种制造凹槽通道晶体管和相关半导体器件的方法。 该方法可以包括在衬底上形成第一栅极沟槽，在第一栅极沟槽的侧壁上形成电介质间隔物，在第一栅极沟槽下面的衬底上形成第二栅极沟槽，以及形成栅电极以填充沟槽。 电介质隔离物可以保留在栅电极和衬底之间。

公开(公告)号：US07531413B2

公开(公告)日：2009-05-12

申请号：US11156271

申请日：2005-06-17

Applicant: Soo-Ho Shin ,  Jin-Woo Lee ,  Eun-Cheol Lee

Inventor： Soo-Ho Shin ,  Jin-Woo Lee ,  Eun-Cheol Lee

IPC: H01L21/336 ,  H01L21/3205

CPC classification number: H01L27/10873 ,  H01L27/10891 ,  H01L29/66787

Abstract: According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predetermined portion of the active region of the semiconductor substrate. Two channel portion holes are formed to extend downward from a main surface of the semiconductor substrate to be in contact with the channel region. Gate patterns fill the channel portion holes and cross the active region. The resulting transistor is capable of ensuring a constant threshold voltage without being affected by an alignment state of the channel portion hole and the gate pattern.

Abstract translation: 根据本发明的一些实施例，形成晶体管的方法包括在半导体衬底中形成器件隔离层。 形成器件隔离层以限定至少一个有源区。 沟道区形成在半导体衬底的有源区的预定部分中。 形成两个通道部分孔，从半导体衬底的主表面向下延伸以与沟道区相接触。 栅极图案填充沟道部分孔并穿过有源区。 所得到的晶体管能够确保恒定的阈值电压，而不受沟道部分孔和栅极图案的取向状态的影响。

公开(公告)号：US20090097214A1

公开(公告)日：2009-04-16

申请号：US12152442

申请日：2008-05-14

Applicant: Jin-woo Lee ,  Jae-hoon Jang

Inventor： Jin-woo Lee ,  Jae-hoon Jang

IPC: H05K5/00 ,  H05K3/02

CPC classification number: H05K1/186 ,  H01L21/4857 ,  H01L23/5389 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H05K1/189 ,  H05K3/4069 ,  H05K3/422 ,  H05K3/4614 ,  H05K2201/09036 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/063 ,  Y10T29/49156 ,  H01L2224/05599

Abstract: Provided is a method of manufacturing a device-embedded circuit board. The method includes: preparing a first substrate with a first pattern portion comprising a conductive material; coupling, for example, an electronic chip to the first substrate; preparing a second substrate with a first through hole corresponding to a part of the first pattern portion, a housing portion for housing the electronic chip, and a first connection portion comprising a conductive material formed in the first through hole; preparing a third substrate with a second through hole corresponding to the first through hole and a second connection portion comprising a conductive material formed in the second through hole; aligning and coupling the first, second and third substrates so that the first pattern portion, the first connection portion and the second connection portion are electrically connected.

Abstract translation: 提供了一种制造器件嵌入式电路板的方法。 该方法包括：制备具有包括导电材料的第一图案部分的第一基板; 将例如电子芯片耦合到第一基板; 制备具有对应于第一图形部分的一部分的第一通孔的第二基板，用于容纳电子芯片的壳体部分和包括形成在第一通孔中的导电材料的第一连接部分; 制备具有对应于第一通孔的第二通孔的第三基板和包括形成在第二通孔中的导电材料的第二连接部分; 对准和耦合第一，第二和第三基板，使得第一图案部分，第一连接部分和第二连接部分电连接。