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102 条记录 (耗时 0.039 秒)

    MULTILAYERED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF
    91.
    发明申请
    MULTILAYERED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF 审中-公开
    多层陶瓷电子元件及其制造方法

    公开(公告)号：US20130002388A1

    公开(公告)日：2013-01-03

    申请号：US13292803

    申请日：2011-11-09

    申请人： Jong Han KIM ,  Jae Man Park ,  Hyun Chul Jeong

    发明人： Jong Han KIM ,  Jae Man Park ,  Hyun Chul Jeong

    IPC分类号： H01F5/00 ,  B05D5/12 ,  H01G4/12

    CPC分类号： H01G4/30 ,  H01G4/012 ,  H01G4/12

    摘要： There is provided a multilayered ceramic electronic component capable of securing capacitance by controlling electrode connectivity. The multilayered ceramic electronic component includes: a ceramic main body; and internal electrodes formed in the interior of the ceramic main body and having a central portion and a tapered portion becoming thinner from the central portion toward edges thereof, respectively, wherein the ratio of the area of the tapered portion to the overall area of the internal electrodes is 35% or less. A desired capacitance can be obtained by controlling an electrode connectivity even in the small high capacitance multilayered ceramic capacitor.

    摘要翻译： 提供了一种能够通过控制电极连接来确保电容的多层陶瓷电子部件。 多层陶瓷电子部件包括：陶瓷主体; 以及形成在陶瓷主体内部并具有中心部分和锥形部分的内部电极分别从其中心部分朝向其边缘变薄，其中锥形部分的面积与内部的总面积的比率 电极为35％以下。 通过控制即使在小的高电容多层陶瓷电容器中的电极连接也可以获得所需的电容。

    Sealant hardening apparatus of liquid crystal display panel and sealant hardening method thereof
    92.
    发明授权
    Sealant hardening apparatus of liquid crystal display panel and sealant hardening method thereof 有权
    液晶显示面板的密封剂硬化装置及其密封剂硬化方法

    公开(公告)号：US08146641B2

    公开(公告)日：2012-04-03

    申请号：US10998563

    申请日：2004-11-30

    申请人： Sang Seok Lee ,  Myoung Gu Kang ,  Jong Han Kim ,  Heung Sun Kim

    发明人： Sang Seok Lee ,  Myoung Gu Kang ,  Jong Han Kim ,  Heung Sun Kim

    IPC分类号： B29C65/00

    CPC分类号： G02F1/1339 ,  B05C9/14 ,  B29C2035/0827

    摘要： A sealant hardening apparatus of an LCD panel and a sealant hardening method is disclosed, being suitable for decreasing a tact time, and for being easily applied to LCD panels of the different models, by irradiating UV rays in a scanning method, or by directly irradiating UV rays to a sealant pattern without using a mask, which includes a stage on which substrates bonded by a sealant are loaded, for being moved in an in-line method; a mask provided above the bonded substrates, having an open part corresponding to a sealant portion to transmit the light, and a closed part corresponding to the remaining portions to prevent the light; at least two align cameras for aligning the mask and the bonded substrates; a lamp for irradiating UV rays of high energy; a plurality of optical fibers for transmitting UV rays of the lamp; and a UV irradiation part for irradiating the UV rays from the optical fibers to the bonded substrates through the mask by arranging and supporting the optical fibers at one line.

    摘要翻译： 公开了一种液晶显示面板的密封硬化装置和密封剂固化方法，其适用于减少拍打时间，并且通过以扫描方式照射紫外线或通过直接照射而容易地应用于不同型号的LCD面板 在不使用掩模的情况下将紫外线照射到密封剂图案，其包括通过密封剂粘合的基底的载物台，以使其以直列方式移动; 设置在接合基板上方的掩模，具有对应于用于透射光的密封剂部分的开口部分以及与其余部分对应的封闭部分以防止光线; 用于对准所述掩模和所述粘合的基底的至少两个对准相机; 用于照射高能量的紫外线的灯; 用于透射灯的紫外线的多根光纤; 以及UV照射部，其通过在一条线上布置和支撑光纤，通过掩模将来自光纤的紫外线照射到接合的基板。

    FLASH MEMORY DEVICE, PROGRAMMING AND READING METHODS PERFORMED IN THE SAME
    93.
    发明申请
    FLASH MEMORY DEVICE, PROGRAMMING AND READING METHODS PERFORMED IN THE SAME 有权
    FLASH存储器件，编程和读取方法

    公开(公告)号：US20110038207A1

    公开(公告)日：2011-02-17

    申请号：US12856698

    申请日：2010-08-16

    申请人： Hee-seok Eun ,  Jong-han Kim ,  Jae-hong Kim ,  Dong-hyuk Chae ,  Seung-hwan Song ,  Han-woong Yoo ,  Jun-jin Kong ,  Young-hwan Lee ,  Kyoung-lae Cho ,  Yong-june Kim

    发明人： Hee-seok Eun ,  Jong-han Kim ,  Jae-hong Kim ,  Dong-hyuk Chae ,  Seung-hwan Song ,  Han-woong Yoo ,  Jun-jin Kong ,  Young-hwan Lee ,  Kyoung-lae Cho ,  Yong-june Kim

    IPC分类号： G11C16/04

    CPC分类号： G11C11/5628 ,  G11C11/5642

    摘要： The flash memory device includes a control logic circuit and a bit level conversion logic circuit. The control logic circuit programs first through Nth bits of data in a memory cell array of the N-bit MLC flash memory device or reads the first through Nth bits of the data from the memory cell array in response to one of a program command and a read command. The bit level conversion control logic circuit, after the first through Nth bits of the data are completely programmed or read, programs or reads an (N+1)th bit of the data in response to a control signal. The bit level conversion control logic circuit converts voltage levels of voltages, which are used for programming or reading the first through Nth bits of the data, to program or read for 2N cell distributions of 2N+1 cell distributions corresponding to the (N+1)th bit of the data and then programs or reads for other 2N cell distributions.

    摘要翻译： 闪存器件包括控制逻辑电路和位电平转换逻辑电路。 控制逻辑电路对N位MLC闪速存储器件的存储单元阵列中的第一至第N位数据进行编程，或响应于程序命令和程序命令之一从存储单元阵列中读取数据的第一至第N位 读命令。 在数据的第一至第N位被完全编程或读取之后，位电平转换控制逻辑电路响应于控制信号编程或读取数据的第（N + 1）位。 位电平转换控制逻辑电路转换用于编程或读取数据的第一至第N位的电压电平，以对与第（N + 1）个对应的2N + 1个单元分布的2N个单元分布进行编程或读取 ）位，然后编程或读取其他2N个单元分布。

    Memory device and method of reading memory data
    94.
    发明申请
    Memory device and method of reading memory data 有权
    存储器件和读取存储器数据的方法

    公开(公告)号：US20090190396A1

    公开(公告)日：2009-07-30

    申请号：US12219264

    申请日：2008-07-18

    申请人： Kyoung Lae Cho ,  Dong Hun Yu ,  Jun Jin Kong ,  Seung-Hwan Song ,  Yoon Dong Park ,  Jong Han Kim ,  Young Hwan Lee

    发明人： Kyoung Lae Cho ,  Dong Hun Yu ,  Jun Jin Kong ,  Seung-Hwan Song ,  Yoon Dong Park ,  Jong Han Kim ,  Young Hwan Lee

    IPC分类号： G11C16/06 ,  G11C7/00

    CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C2211/5634

    摘要： A memory device and a method of reading multi-bit data stored in a multi-bit cell array may be provided. The memory device may include a multi-bit cell array including a least one memory page with each memory page having a plurality of multi-bit cells, and a determination unit to divide the plurality of multi-bit cells into a first group and second group. The first group may include multi-bit cells with a threshold voltage higher than a reference voltage. The second group may include multi-bit cells with a threshold voltage lower than the reference voltage. The determination unit may sequentially update the first group and second group while changing the reference voltage.

    摘要翻译： 可以提供存储器件和读取存储在多位单元阵列中的多位数据的方法。 存储器件可以包括多比特单元阵列，其包括至少一个存储器页，每个存储器页具有多个多位单元，以及确定单元，用于将多个多位单元划分成第一组和第二组 。 第一组可以包括具有高于参考电压的阈值电压的多位单元。 第二组可以包括阈值电压低于参考电压的多位单元。 确定单元可以在改变参考电压的同时顺序地更新第一组和第二组。

    Method for detecting and decoding a signal in a MIMO communication system
    96.
    发明申请
    Method for detecting and decoding a signal in a MIMO communication system 审中-公开
    用于在MIMO通信系统中检测和解码信号的方法

    公开(公告)号：US20060215781A1

    公开(公告)日：2006-09-28

    申请号：US11386490

    申请日：2006-03-22

    申请人： Dong-Jun Lee ,  In-Kyu Lee ,  Min-Young Ahn ,  Jong-Han Kim ,  Heun-Chul Lee

    发明人： Dong-Jun Lee ,  In-Kyu Lee ,  Min-Young Ahn ,  Jong-Han Kim ,  Heun-Chul Lee

    IPC分类号： H04L1/02 ,  H04B7/02

    CPC分类号： H04L27/2647 ,  H04L1/0656 ,  H04L2025/03414

    摘要： A method for detecting and decoding a signal in a communication system based on Multiple-Input Multiple-Output (MIMO)-Orthogonal Frequency Division Multiplexing (OFDM). A signal is received through multiple receive antennas. A decision error occurring at a symbol decision time is considered and a symbol is detected from transmitted symbols. Original data transmitted from the detected symbol is recovered. The performance of a coded bit system can be significantly improved using a new equalization matrix G considering a decision error.

    摘要翻译： 一种用于在基于多输入多输出（MIMO） - 正交频分复用（OFDM）的通信系统中检测和解码信号的方法。 通过多个接收天线接收信号。 考虑在符号决定时间发生的判定错误，并且从发送的符号检测符号。 从检测到的符号发送的原始数据被恢复。 考虑到决策误差，使用新的均衡矩阵G可以显着改善编码比特系统的性能。

    Non reducible dielectric ceramic composition and super-thin multi-layer ceramic capacitor using the same
    98.
    发明授权
    Non reducible dielectric ceramic composition and super-thin multi-layer ceramic capacitor using the same 有权
    不可还原的介电陶瓷组合物和超薄多层陶瓷电容器使用相同

    公开(公告)号：US06917513B1

    公开(公告)日：2005-07-12

    申请号：US10884952

    申请日：2004-07-07

    申请人： Woo Sup Kim ,  Chan Kong Kim ,  Kang Heon Hur ,  Jong Han Kim

    发明人： Woo Sup Kim ,  Chan Kong Kim ,  Kang Heon Hur ,  Jong Han Kim

    IPC分类号： C04B35/46 ,  C04B35/468 ,  H01B3/12 ,  H01G4/06 ,  H01G4/12 ,  H01G4/30

    CPC分类号： H01G4/1227 ,  H01G4/30

    摘要： The non reducible dielectric ceramic composition comprising a main component of (Ba1-xCax)m(Ti1-yZry)O3, subcomponents of MgO, Re2O3, MO, MnO and V2O5 where Re is one or more elements selected from the group of Y, Dy and Ho and M is one or two elements selected from the group of Ba and Ca, and a sintering aid of SiO2, wherein when the composition is represented by the formula 100(Ba1-xCax)m(Ti1-yZry)O3+bMgO+cRe2O3+dMO+eMnO+fV2O5+gSiO2, the ratio of the components satisfies the conditions of 0.005≦x≦0.15, 0.995≦m≦1.03, 0.0005≦y≦0.005, 0.1≦b≦3.0, 0.1≦c≦3.0, 0.05≦d≦2.0, 0.05≦e≦50.3, 0.0.≦f≦0.1, and 0.2≦g≦3.0 based on the molar ratio.

    摘要翻译： 不可还原的介电陶瓷组合物包含主要成分为（Ba 1-x Ca 2）m（Ti 1-y） / 3，Y 3 O 3 O 3，MgO，Re 2 O 3 N 3，Mo，MnO和 其中Re是选自Y，Dy和Ho中的一种或多种元素，M是选自Ba和Ca中的一种或两种元素 ，和SiO 2的烧结助剂，其中当组合物由式100表示​​时（Ba 1-x C x S x N）＆lt; SUB （Ti 1-y Z y）O 3 + b M g O + c Re 2 O 3％+ dMO + eMnO + fV 2 O 5 + gSiO 2 2，组分的比例满足条件 为0.005 <= x <=0.15,0.995≤m≤1.03,0.0005≤y≤0.005,0.1≤b≤3.0,0.1≤c≤3.0,0.05≤d≤2.0,0.05 基于摩尔比，<= e <= 50.3,0.0。<= f <= 0.1和0.2 <= g <= 3.0。