公开(公告)号：US10084481B2

公开(公告)日：2018-09-25

申请号：US14574411

申请日：2014-12-18

Applicant: APPLE INC.

Inventor： Naftali Sommer ,  Moti Teitel ,  Micha Anholt

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/29 ,  H03M13/37 ,  H03M13/45

CPC classification number: H03M13/1148 ,  H03M13/1128 ,  H03M13/1142 ,  H03M13/1174 ,  H03M13/2963 ,  H03M13/2975 ,  H03M13/3715 ,  H03M13/453

Abstract: A decoder includes circuitry and a soft decoder. The circuitry is configured to receive channel hard decisions for respective bits of a Generalized Low-Density Parity Check (GLDPC) code word that includes multiple component code words, including first and second component code words having one or more shared bits, to schedule decoding of the GLDPC code word, and following the decoding, to output the decoded GLDPC code word. The soft decoder is configured to receive the channel hard decisions corresponding to the first component code word, to further receive soft reliability measures that were assigned to the shared bits in decoding the second component code word, and to decode the first component code word based on the channel hard decisions and the soft reliability measures.

公开(公告)号：US10056135B2

公开(公告)日：2018-08-21

申请号：US15256992

申请日：2016-09-06

Applicant: Apple Inc.

Inventor： Ofir Shalvi ,  Naftali Sommer ,  Dotan Sokolov ,  Yoav Kasorla

IPC: G11C11/56 ,  G11C16/34 ,  G11C29/52 ,  G11C29/00 ,  G06F11/10 ,  H03M13/29

CPC classification number: G11C11/5628 ,  G06F11/1008 ,  G06F11/1068 ,  G11C11/56 ,  G11C16/34 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/52 ,  H03M13/2906

Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

公开(公告)号：US09779818B2

公开(公告)日：2017-10-03

申请号：US14794862

申请日：2015-07-09

Applicant: APPLE INC.

Inventor： Barak Baum ,  Alex Radinski ,  Eyal Gurgi ,  Naftali Sommer ,  Tsafrir Kamelo

IPC: G11C7/14 ,  G11C29/52 ,  G11C29/04 ,  G11C29/02 ,  G11C27/00 ,  G11C16/34 ,  G11C11/56 ,  G06F11/10 ,  G06F11/07 ,  G11C16/10 ,  G11C16/28 ,  G11C29/42 ,  G11C16/26

CPC classification number: G11C16/10 ,  G06F11/1012 ,  G11C7/14 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/28 ,  G11C16/3418 ,  G11C16/3459 ,  G11C27/005 ,  G11C29/021 ,  G11C29/028 ,  G11C29/42 ,  G11C2029/0409

Abstract: A method includes storing data in memory cells by programming the memory cells with respective values. The memory cells are read in multiple readout operations that each compares the programmed values to at least first and second read thresholds, while keeping the first read threshold fixed throughout the readout operations and perturbing only the second read threshold between the readout operations. A preferred value for the second read threshold is estimated based on the multiple readout operations.

公开(公告)号：US09697077B2

公开(公告)日：2017-07-04

申请号：US14740088

申请日：2015-06-15

Applicant: Apple Inc.

Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

IPC: G06F11/00 ,  G06F11/10 ,  G11C11/56 ,  G06F12/00 ,  G11C29/50 ,  G11C29/52

CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

公开(公告)号：US09490023B2

公开(公告)日：2016-11-08

申请号：US14219315

申请日：2014-03-19

Applicant: Apple Inc.

Inventor： Naftali Sommer ,  Avraham Poza Meir ,  Yoav Kasorla ,  Eyal Gurgi

IPC: G11C16/34 ,  G11C7/02 ,  G11C7/04

CPC classification number: G11C16/3404 ,  G11C7/02 ,  G11C7/04

Abstract: A method includes storing data values in a group of memory cells that share a common isolating layer, by producing quantities of electrical charge representative of the data values at respective regions of the common isolating layer that are associated with the memory cells. A function, which relates a drift of the electrical charge in a given memory cell in the group to the data values stored in one or more other memory cells in the group, is estimated. The drift is compensated for using the estimated function.

Abstract translation: 一种方法包括通过产生表示与存储器单元相关联的公共隔离层的各个区域处的数据值的电荷量来将数据值存储在共享公共隔离层的一组存储器单元中。 估计将组中的给定存储单元中的电荷的漂移与存储在组中的一个或多个其他存储单元中的数据值相关联的功能。 使用估计功能补偿漂移。

公开(公告)号：US09401212B2

公开(公告)日：2016-07-26

申请号：US14822992

申请日：2015-08-11

Applicant: Apple Inc.

Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Naftali Sommer ,  Yoav Kasorla

IPC: G11C16/10 ,  G11C16/04 ,  G11C11/56 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5671 ,  G11C16/0466 ,  G11C16/3418 ,  G11C16/3427

Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.

Abstract translation: 一种方法包括在共享公共隔离层并存储在公共隔离层中的代表数据值的电荷量的多个存储器单元中，分配用于数据存储的第一组存储器单元，以及分配第二组 用于保护存储在第一组中的电荷的存储单元不保持漂移。 数据存储在第一组的存储单元中。 防止第一组的存储单元中保持漂移的电荷的保护量被存储在第二组的存储单元中。

公开(公告)号：US09262315B2

公开(公告)日：2016-02-16

申请号：US13935746

申请日：2013-07-05

Applicant: Apple Inc.

Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Shai Ojalvo ,  Yoav Kasorla ,  Naftali Sommer

IPC: G06F12/00 ,  G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7211

Abstract: A method for data storage in a memory that includes multiple analog memory cells, includes defining, based on a characteristic of the memory cells, an uneven wear leveling scheme that programs and erases at least first and second subsets of the memory cells with respective different first and second Programming and Erasure (P/E) rates. Data is stored in the memory in accordance with the uneven wear leveling scheme.

Abstract translation: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法，包括基于所述存储器单元的特性定义不均匀磨损平衡方案，所述不均匀磨损均衡方案以相应不同的第一方式来编程和擦除所述存储器单元的至少第一和第二子集 和第二个编程和擦除（P / E）率。 根据不均匀的磨损均衡方案将数据存储在存储器中。

公开(公告)号：US20150309870A1

公开(公告)日：2015-10-29

申请号：US14740088

申请日：2015-06-15

Applicant: Apple Inc.

Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

IPC: G06F11/10 ,  G11C29/52 ,  G11C29/50

CPC classification number: G06F11/1072 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1076 ,  G06F12/00 ,  G11C11/56 ,  G11C29/50004 ,  G11C29/52 ,  G11C2029/5004

Abstract: A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

Abstract translation: 一种用于操作存储器的方法包括：通过将输入存储值写入到一组模拟存储器单元中，将数据存储在制造在第一半导体管芯上的多个模拟存储器单元中。 在存储数据之后，使用相应的不同的阈值集合读取组中每个模拟存储器单元的多个输出存储值，从而提供分别对应于阈值集合的输出存储值的多个输出组。 输出存储值的多个输出组由在第一半导体管芯上制造的电路预处理，以产生预处理的数据。 预处理数据被提供给存储器控制器，该存储器控制器制造在与第一半导体管芯不同的第二半导体管芯上。 以使得存储器控制器能够响应于预处理的数据重构数据。

公开(公告)号：US09136003B1

公开(公告)日：2015-09-15

申请号：US14249403

申请日：2014-04-10

Applicant: Apple Inc.

Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Naftali Sommer ,  Yoav Kasorla

IPC: G11C11/34 ,  G11C16/10 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C11/5671 ,  G11C16/0466 ,  G11C16/3418 ,  G11C16/3427

Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.

Abstract translation: 一种方法包括在共享公共隔离层并存储在公共隔离层中的代表数据值的电荷量的多个存储器单元中，分配用于数据存储的第一组存储器单元，以及分配第二组 用于保护存储在第一组中的电荷的存储单元不保持漂移。 数据存储在第一组的存储单元中。 防止第一组的存储单元中保持漂移的电荷的保护量被存储在第二组的存储单元中。

公开(公告)号：US09007835B2

公开(公告)日：2015-04-14

申请号：US13865351

申请日：2013-04-18

Applicant: Apple Inc.

Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Naftali Sommer ,  Yoav Kasorla

IPC: G11C11/34 ,  G11C16/04 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/3454 ,  G11C16/3459

Abstract: A method includes storing data in a memory, which includes multiple strings of analog memory cells arranged in a three-dimensional (3-D) configuration having a first dimension associated with bit lines, a second dimension associated with word lines and a third dimension associated with sections, such that each string is associated with a respective bit line and a respective section and includes multiple memory cells that are connected to the respective word lines. For a group of the strings, respective values of a property of the strings in the group are evaluated. Source-side voltages are calculated for the respective strings in the group, depending on the respective values of the property, and respective source-sides of the strings in the group are biased with the corresponding source-side voltages. A memory operation is performed on the strings in the group while the strings are biased with the respective source-side voltages.

Abstract translation: 一种方法包括将数据存储在存储器中，其包括以具有与位线相关联的第一维度的三维（3-D）配置布置的多个模拟存储器单元串，与字线相关联的第二维度和与第三维度相关联的第三维度 具有部分，使得每个字符串与相应的位线和相应的部分相关联，并且包括连接到各个字线的多个存储器单元。 对于一组字符串，对组中字符串的属性的各个值进行评估。 根据属性的各个值，针对组中的各个串来计算源侧电压，并且组中的串的各个源侧被相应的源极侧电压偏置。 当串被相应的源侧电压偏置时，对组中的串执行存储器操作。