Performance in reading memory cells affected by neighboring memory cells

    公开(公告)号:US10884855B1

    公开(公告)日:2021-01-05

    申请号:US16535115

    申请日:2019-08-08

    Applicant: Apple Inc.

    Abstract: A storage device includes circuitry and memory cells that store data in Np programming levels of threshold voltage values. The circuitry defines NRv threshold-sets, each includes Ns read thresholds that define Ns+1 zones, produces Ns readouts by reading, from a target WL, using the NS read thresholds, a target page that was stored encoded using an Error Correction Code (ECC), and produces a reference readout by reading the target page using optimal read thresholds. The circuitry identifies Np programming levels of memory cells in a neighbor WL for classifying target cells in the target WL into Np·NRv cell-groups. The circuitry calculates, per zone, Np LLR values, for the respective Np programming levels, based on the reference readout, the Ns readouts and the classification, assigns the LLR values to the target cells, and recovers the target page by applying to the assigned LLR values soft decoding for decoding the ECC.

    Mitigating reliability degradation of analog memory cells during long static and erased state retention
    3.
    发明授权
    Mitigating reliability degradation of analog memory cells during long static and erased state retention 有权
    在长静态和擦除状态保持期间,减轻模拟存储单元的可靠性降级

    公开(公告)号:US09236132B2

    公开(公告)日:2016-01-12

    申请号:US14249448

    申请日:2014-04-10

    Applicant: Apple Inc.

    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.

    Abstract translation: 一种非易失性存储器中的方法,其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元,包括接收指示要保留的一组存储器单元的存储操作,而不进行编程 长时间 组中的存储单元设置为与擦除级别不同的保留编程级别。 在准备使用数据对存储器单元组进行编程时,存储器单元组被擦除到擦除的电平,然后将数据编程在存储器单元组中。

    MITIGATION OF DATA RETENTION DRIFT BY PROGRAMMING NEIGHBORING MEMORY CELLS
    4.
    发明申请
    MITIGATION OF DATA RETENTION DRIFT BY PROGRAMMING NEIGHBORING MEMORY CELLS 审中-公开
    通过编程相邻存储器细胞来减缓数据保留

    公开(公告)号:US20150348632A1

    公开(公告)日:2015-12-03

    申请号:US14822992

    申请日:2015-08-11

    Applicant: Apple Inc.

    Abstract: A method includes, in a plurality of memory cells that share a common isolation layer and store in the common isolation layer quantities of electrical charge representative of data values, assigning a first group of the memory cells for data storage, and assigning a second group of the memory cells for protecting the electrical charge stored in the first group from retention drift. Data is stored in the memory cells of the first group. Protective quantities of the electrical charge that protect from the retention drift in the memory cells of the first group are stored in the memory cells of the second group.

    Abstract translation: 一种方法包括在共享公共隔离层并存储在公共隔离层中的代表数据值的电荷量的多个存储器单元中,分配用于数据存储的第一组存储器单元,以及分配第二组 用于保护存储在第一组中的电荷的存储单元不保持漂移。 数据存储在第一组的存储单元中。 防止第一组的存储单元中保持漂移的电荷的保护量被存储在第二组的存储单元中。

    HIGH-PERFORMANCE ECC DECODER
    5.
    发明申请
    HIGH-PERFORMANCE ECC DECODER 审中-公开
    高性能ECC解码器

    公开(公告)号:US20150347230A1

    公开(公告)日:2015-12-03

    申请号:US14821124

    申请日:2015-08-07

    Applicant: Apple Inc.

    Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    Abstract translation: 用于纠错码(ECC)解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式(ELP)是基于综合征产生的。 识别至少一些ELP根,并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作,在给定的场元件上评估ELP,其中每个串行乘法器执行乘法周期序列,并在每个周期中产生中间结果。 响应于检测至少一个中期结果,指示给定的元素不是ELP根,在完成序列之前终止乘法循环。

    Independent management of data and parity logical block addresses
    6.
    发明授权
    Independent management of data and parity logical block addresses 有权
    独立管理数据和奇偶逻辑块地址

    公开(公告)号:US09170885B2

    公开(公告)日:2015-10-27

    申请号:US14468527

    申请日:2014-08-26

    Applicant: Apple Inc.

    Abstract: A data storage method includes identifying, in a set of data items associated with respective logical addresses for storage in a memory, a first subset of the logical addresses associated with the data items containing application data, and a second subset of the logical addresses associated with the data items containing parity information that has been calculated over the application data. The data items associated with the first identified subset are stored in one or more first physical memory areas of the memory, and the data items associated with the second identified subset are stored in one or more second physical memory areas of the memory, different from the first physical memory areas. A memory management task is performed independently in the first physical memory areas and in the second physical memory areas.

    Abstract translation: 数据存储方法包括在与存储在存储器中的各个逻辑地址相关联的一组数据项中识别与包含应用数据的数据项相关联的逻辑地址的第一子集,以及与包含应用数据的逻辑地址相关联的第二子集 包含已经通过应用数据计算的奇偶校验信息的数据项。 与第一识别的子集相关联的数据项存储在存储器的一个或多个第一物理存储器区域中,并且与第二识别的子集相关联的数据项存储在存储器的一个或多个第二物理存储器区域中,不同于 第一个物理内存区域。 在第一物理存储器区域和第二物理存储器区域中独立地执行存储器管理任务。

    Selective re-programming of analog memory cells
    7.
    发明授权
    Selective re-programming of analog memory cells 有权
    模拟存储单元的选择性重新编程

    公开(公告)号:US09153329B2

    公开(公告)日:2015-10-06

    申请号:US14336054

    申请日:2014-07-21

    Applicant: Apple Inc.

    CPC classification number: G11C16/10 G11C11/5628 G11C16/3459 G11C29/78

    Abstract: A method for data storage includes defining, in a memory that includes multiple analog memory cells, an erased state, a set of non-erased programming states and a partial subset of the non-erased programming states. Data is initially stored in a first group of the analog memory cells by programming each of at least some of the memory cells in the first group from the erased state to a respective non-erased programming state selected from the set of non-erased programming states. After initially storing the data, a second group of the analog memory cells, which potentially cause interference to the first group, is programmed. After programming the second group, the first group is selectively re-programmed with the data by repeating programming of only the memory cells in the first group whose respective programming states belong to the partial subset.

    Abstract translation: 一种用于数据存储的方法包括在包括多个模拟存储器单元的存储器中定义擦除状态,一组未擦除的编程状态和未擦除编程状态的部分子集。 最初将数据存储在第一组模拟存储器单元中,通过将第一组中的至少一些存储单元中的每一个从擦除状态编程为从非擦除编程状态集合中选择的各自的非擦除编程状态 。 在最初存储数据之后,编程可能对第一组产生干扰的第二组模拟存储器单元。 在对第二组进行编程之后,通过重复仅对其各自编程状态属于部分子集的第一组中的存储器单元进行编程,对该第一组进行有选择地重新编程。

    Management of Data Storage in Analog Memory Cells Using a Non-Integer Number of Bits Per Cell
    8.
    发明申请
    Management of Data Storage in Analog Memory Cells Using a Non-Integer Number of Bits Per Cell 有权
    使用每个单元的非整数位数来管理模拟存储器单元中的数据存储

    公开(公告)号:US20150179263A1

    公开(公告)日:2015-06-25

    申请号:US14135823

    申请日:2013-12-20

    Applicant: APPLE INC.

    Abstract: A method for data storage includes storing data in a group of memory cells, by encoding the data using at least an outer code and an inner code, and optionally inverting the encoded data prior to storing the encoded data in the memory cells. The encoded data is read from the memory cells, and inner code decoding is applied to the read encoded data to produce a decoding result. At least part of the read data is conditionally inverted, depending on the decoding result of the inner code.

    Abstract translation: 一种用于数据存储的方法包括:通过使用至少一个外部代码和一个内部代码对数据进行编码,以及在将编码数据存储在存储器单元中之前可选地反转编码数据,将数据存储在一组存储单元中。 从存储器单元读取编码数据,并将内码解码应用于读取的编码数据以产生解码结果。 根据内部代码的解码结果,至少部分读取数据有条件地反转。

    MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION
    9.
    发明申请
    MITIGATING RELIABILITY DEGRADATION OF ANALOG MEMORY CELLS DURING LONG STATIC AND ERASED STATE RETENTION 有权
    在长期静态和擦除状态下,减轻模拟记忆细胞的可靠性降低

    公开(公告)号:US20140355347A1

    公开(公告)日:2014-12-04

    申请号:US14249448

    申请日:2014-04-10

    Applicant: Apple Inc.

    Abstract: A method in a non-volatile memory, which includes multiple memory cells that store data using a predefined set of programming levels including an erased level, includes receiving a storage operation indicating a group of the memory cells that are to be retained without programming for a long time period. The memory cells in the group are set to a retention programming level that is different from the erased level. Upon preparing to program the group of memory cells with data, the group of memory cells is erased to the erased level and the data is then programmed in the group of memory cells.

    Abstract translation: 一种非易失性存储器中的方法,其包括使用包括擦除级别的预定义编程级别集存储数据的多个存储器单元,包括接收指示要保留的一组存储器单元的存储操作,而不进行编程 长时间 组中的存储单元设置为与擦除级别不同的保留编程级别。 在准备使用数据对存储器单元组进行编程时,存储器单元组被擦除到擦除的电平,然后将数据编程在存储器单元组中。

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